Serial access memory

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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Details

C365S207000

Reexamination Certificate

active

06845058

ABSTRACT:
A serial access memory low in current consumption, capable of restraining an increase in a chip size even if memory capacity increases. The serial access memory has a first and a second memory arrays each having memory cells electrically connected to corresponding bit lines, signal lines provided in common between the memory arrays and electrically connected to the corresponding bit lines through first transfer circuits, write registers electrically connected to the corresponding signal lines through a second transfer circuit, a write bus electrically connected to the write registers through a third transfer circuit, an input circuit electrically connected to the write bus, read registers electrically connected to the corresponding signal lines through a fourth transfer circuit, a read bus electrically connected to the read registers through a fifth transfer circuit, and an input circuit electrically connected to the read bus.

REFERENCES:
patent: 4703453 (1987-10-01), Shinoda et al.
patent: 5592434 (1997-01-01), Iwamoto et al.
patent: 5594704 (1997-01-01), Konishi et al.
patent: 6005820 (1999-12-01), Imondi et al.
patent: 6118729 (2000-09-01), Hirabayashi et al.
patent: 6278644 (2001-08-01), Takasugi

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