Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2005-04-12
2005-04-12
Goudreau, George A. (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S714000, C438S723000, C438S734000, C438S736000, C438S740000, C134S001200
Reexamination Certificate
active
06878637
ABSTRACT:
The present invention provides a method for fabricating a semiconductor device capable of minimizing losses of a gate electrode and a hard mask during a self align contact (SAC) formation process. For this effect, the present invention includes the steps of: forming a plurality of conductive patterns on a substrate; forming hard masks on the conductive patterns; forming an organic based dielectric layer on the substrate including the conductive patterns and the hard mask; forming an oxide based insulation layer on the organic based dielectric layer; selectively etching the insulation layer so as to expose the organic based dielectric layer allocated between the conductive patterns; and selectively etching the exposed organic based dielectric layer to form a contact hole that exposes the surfaces of the substrate between the conductive patterns with an O2gas as a main etching gas.
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Goudreau George A.
Hynix / Semiconductor Inc.
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