Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead
Reexamination Certificate
2005-03-01
2005-03-01
Dang, Phuc T. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
C257S786000
Reexamination Certificate
active
06861748
ABSTRACT:
A test structure for an integrated circuit having a first underlying conductive layer. A first nonconductive layer is disposed over the first underlying conductive layer, and a first overlying conductive layer is disposed over the first nonconductive layer. First conductive vias form electrical connections between the first underlying conductive layer and the first overlying conductive layer. A second overlying conductive layer is disposed over the first nonconductive layer, but the second overlying conductive layer does not make electrical connections to the first underlying conductive layer. The test structure also has a second underlying conductive layer. A second nonconductive layer is disposed over the second underlying conductive layer, with a third overlying conductive layer disposed over the second nonconductive layer. The third overlying conductive layer does not make electrical connections to the second underlying conductive layer. A fourth overlying conductive layer is disposed over the second nonconductive layer, and second conductive vias form electrical connections between the second underlying conductive layer and the fourth overlying conductive layer. First conductive traces form electrical connections between the first overlying conductive layer and the third conductive layer, and second conductive traces form electrical connections between the second overlying conductive layer and the fourth conductive layer.
REFERENCES:
patent: 5789271 (1998-08-01), Akram
Low Qwai H.
Ranganathan Ramaswamy
Torcuato Rey
Dang Phuc T.
LSI Logic Corporation
Luedeka Neely & Graham P.C.
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