Non-volatile semiconductor memory device in which one page...

Details Non-volatile semiconductor memory device in which one page... Non-volatile semiconductor memory device in which one page...

2005-03-08

2005-03-08

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185120

Reexamination Certificate

active

06865112

ABSTRACT:
A plurality of memory cell arrays are provided. Each of the memory cell arrays has a plurality of memory cells and the memory cells are connected to a plurality of word lines. Corresponding with the plurality of memory cell arrays, a plurality of word line drive circuits and a plurality of bit line control circuits are provided. Each of the word line drive circuits selects and drives the word lines of the corresponding memory cell array. Each of the bit control circuits carries out verifying reading for the data written in advance in the plurality of memory cells of the corresponding memory cell array, and controls a select and driving operation for the word lines of the corresponding word line drive circuit based on a result of the verifying reading.

REFERENCES:
patent: 5748535 (1998-05-01), Lin et al.
patent: 5768190 (1998-06-01), Tanaka et al.
patent: 5825690 (1998-10-01), Saitoh
patent: 5835414 (1998-11-01), Hung et al.
patent: 5936890 (1999-08-01), Yeom
patent: 5995417 (1999-11-01), Chen et al.

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