Semiconductor package including a plurality of semiconductor...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead

Reexamination Certificate

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Details

C257S735000, C257S692000, C257S690000, C257S678000

Reexamination Certificate

active

06882047

ABSTRACT:
A chip including a power MOS circuit in the high level side and a chip including a power MOS circuit in the low level side are accommodated within one sealing body. In this structure, the leads connecting the drain electrodes of the power MOS circuits in the high level and low level sides are set wide and are projected asymmetrically from both longer sides surfaces of the sealing body. Accordingly, the semiconductor device including a composite power MOSFET can be mounted easily.

REFERENCES:
patent: 4891686 (1990-01-01), Krausse, III
patent: 6307272 (2001-10-01), Takahashi et al.
patent: 6528880 (2003-03-01), Planey

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