Flip chip with novel power and ground arrangement

Details Flip chip with novel power and ground arrangement Flip chip with novel power and ground arrangement

2005-05-10

2005-05-10

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S123000, C438S128000, C438S129000, C438S309000, C438S612000, C438S666000

Reexamination Certificate

active

06890794

ABSTRACT:
A method of forming a flip chip device comprises providing a semiconductor die having a core area and a periphery area. The periphery area includes an electrostatic discharge (ESD) structure. The semiconductor die including includes at least one power conductor. A substrate having a source of power is provided. A first connection circuit is located within the semiconductor die core area to couple power between the substrate and the semiconductor die power conductor. The ESD structure is electrically coupled to the first connection circuit. The first connection circuit is electrically coupled to the substrate via a conductive bump.

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