Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2005-01-04
2005-01-04
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S108000, C438S121000, C438S598000
Reexamination Certificate
active
06838310
ABSTRACT:
A semiconductor die and an associated low resistance interconnect located primarily on the bottom surface of such die is disclosed. This arrangement provides a flexible packaging structure permitting easy interconnected with other integrated circuits; in this manner, a number of such circuits can be stacked to create high circuit density multi-chip modules. A process for making the device is further disclosed. To preserve structural integrity of a wafer containing such die during manufacturing, a through-hole via formed as part of the interconnect is filled with an inert material during operations associated with subsequent active device formation on such die.
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Gross J. Nicholas
Nguyen Tuan H.
United Microelectronics Corporation
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