Method for fabricating embedded flash ROM structure having...

Details Method for fabricating embedded flash ROM structure having... Method for fabricating embedded flash ROM structure having...

2005-05-24

2005-05-24

Nelms, David (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185050, C365S185180

Reexamination Certificate

active

06898127

ABSTRACT:
A method for fabricating an embedded flash ROM structure having code cells and data cells. A substrate is provided and then a plurality of bit lines are formed over the substrate. A plurality of isolation structures are formed over the bit lines and a charge trapping layer is formed between the isolation structures. A plurality of word lines are formed over the isolation structures and the charge trapping layer to form the embedded flash ROM structure. According to requirement, embedded flash ROM structure is divided into a code cell region and a data cell region.

REFERENCES:
patent: 5872994 (1999-02-01), Akiyama et al.
patent: 5896316 (1999-04-01), Toyoda
patent: 6285574 (2001-09-01), Eitan
patent: 6421267 (2002-07-01), Kuo et al.
patent: 20020176291 (2002-11-01), Cheung et al.
patent: 20030107092 (2003-06-01), Chevallier

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