Synchronization signal separator circuit

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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H04N 508

Patent

active

041852990

ABSTRACT:
A synchronization signal separator circuit is provided for separating the synchronizing signal components of a composite video signal. A composite video signal containing negatively-directed synchronizing pulse components is coupled to one input of a differential amplifier comprising two transistors of one conductivity type, and to the base electrodes of a peak detector charging transistor of opposite conductivity type. The charging transistor charges a peak detecting capacitor to a reference level which establishes the slicing level of the sync separator. The base-to-emitter voltage of the charging transistor offsets the slicing level by one V.sub.be relative to the sync pulse tips, thereby ensuring that the slicing level is offset from the sync tip level. The peak detecting capacitor is coupled to a second input of the differential amplifier, where the slicing level is compared with the composite video signal for separation of the sync pulses. A current source resistor is also provided, which is the sole source of charging current for the peak detecting capacitor between sync pulse intervals. The charging current allows the slicing level to vary so as to follow changes in video signal level. The sync separator recovery circuit is provided which is keyed to cause the slicing level to change rapidly in response to sudden changes in signal level.

REFERENCES:
patent: 3524021 (1970-08-01), Hickok
patent: 3706847 (1972-12-01), Smeulers
patent: 3869568 (1975-03-01), Ueda et al.

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