Switching regulator with transient recovery circuit

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C323S284000, C361S018000

Reexamination Certificate

active

06825642

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This present invention relates generally to a power conversion circuit and more particularly to a switching regulator with fast transient recovery.
2. Description of the Related Art
A power conversion circuit (e.g., a switching regulator) accepts a Direct Current (DC) voltage source at one level and outputs a desired DC voltage at another level. The switching regulator includes one or more switches, which can be implemented by Metal-Oxide-Semiconductor-Field-Effect-Transistors (MOSFETs). The switches alternate between connecting and disconnecting the voltage source to circuits that drive the output. The duty cycle of the switching determines the output voltage level. The switching is typically controlled by a Pulse-Width Modulation (PWM) circuit.
Switching regulators are useful in high current applications, such as high power microprocessors, Pentium II and Pentium III based applications, notebook computers, desktop computers, network servers, large memory arrays, workstations and DC high power distribution systems, which typically use 15 to 200 amperes. The switching regulator can have multiple parallel channels to process one or more voltage sources to drive a common output. Each channel is substantially identical and includes an inductor. The input terminal of each inductor is switched between the respective voltage source and ground.
The operating speeds of microprocessors are constantly increasing. One method to increase operating speed is to decrease operating voltages. For example, operating voltages of high-speed microprocessors have decreased to 1.5 to 2.0 volts. Correspondingly, the range for operating currents over a short span of time has increased. For example, the operating current can vary between 3 to 35 amperes in a few instruction cycles. Equivalently, the slew rate can be in the order of 30 to 40 amperes per microsecond.
The transient response of typical switching regulators is not satisfactory in applications with demands for high slew rates of output currents. The switching regulator regulates output voltage using a relatively slow feedback circuit which continuously adjusts a control parameter, such as duty cycle. The duty cycle is adjusted in accordance with differences between the output voltage of the switching regulator and a nominal value. Under this approach, the speed of a transient response to a changing output current is limited to ensure stability of the feedback system. Therefore, the output voltage undershoots when the switching regulator cannot respond fast enough to provide more output current, and the output voltage overshoots when the switching regulator cannot respond fast enough to decrease the flow of excess output current.
Although the switching regulator can theoretically achieve faster transient responses by operating at higher frequencies, practical switching devices limit the operating frequencies of the switching regulator. For instance, the inherent impedance of inductors reduces efficiency at high switching frequencies.
The switching regulator can use multiple parallel channels to improve the transient response time without increasing the switching frequency. However, more parts are used, thereby increasing space and cost. Further, the output power capacity of the parallel channels is generally much greater than the power capacity needed by the microprocessor, thereby contributing to inefficiency.
SUMMARY OF THE INVENTION
The present invention solves these and other problems by providing a switching regulator with a transient recovery circuit. The transient recovery circuit responds to relatively quick changes in load currents while a feedback circuit in the switching regulator responds to relatively slow changes in load currents. The transient recovery circuit suppresses overshoots or undershoots (i.e., droops) in the output voltage of the switching regulator when the load changes. The transient recovery circuit quickly adjusts the switching regulator for less output current to overcome an overshoot and quickly adjusts the switching regulator for more output current to overcome an undershoot.
The transient recovery circuit operates independently of the feedback circuit. The feedback circuit does not react to relatively fast changes in load currents due to its slow response. The transient recovery circuit is inactive in the absence of rapid transient conditions, thereby not affecting switching regulator operations during relatively slow changes in load currents. In one embodiment, the transient recovery circuit is disabled during power up or power down.
In one embodiment, the transient recovery circuit sets the switching regulator to operate at minimum duty cycle when the output voltage of the switching regulator increases by more than a first limit in a relatively short period of time. A transient increase in the output voltage indicates a change from a heavy current loading condition to a light current loading condition. Correspondingly, the transient recovery circuit sets the switching regulator to operate at maximum duty cycle when the output voltage of the switching regulator decreases by more than a second limit in the relatively short period of time. A transient decrease in the output voltage indicates a change from a light current loading condition to a heavy current loading condition. The increases or decreases in the output voltage occur when the switching regulator cannot adapt fast enough to the new loading conditions.
The first limit (i.e., the overshoot threshold) and the second limit (i.e., the undershoot threshold) can be the same or different. A user can set or adjust the thresholds. In one embodiment, the threshold is adjusted by changing the value of an external resistor.
The transient recovery circuit includes a comparing reference generator and two detectors. The output voltage of the switching regulator is provided to the two detectors. The output voltage of the comparing reference generator is provided to both detectors. One of the detectors (i.e., the overshoot detector) outputs a high state when the output of the switching regulator is greater than the output of the comparing reference generator by the first limit. The other detector (i.e., the undershoot detector) outputs a high state when the output of the switching regulator is less than the output of the comparing reference generator by the second limit.
In one embodiment, the comparing reference generator is a Low Pass Filter (LPF) with a selected time constant to permit the transient recovery circuit to adapt to a new output voltage. The output voltage of the switching regulator is provided to the input of the LPF. The output of the LPF is provided as a comparing reference voltage to the two detectors. In one embodiment, a buffer amplifier is placed at the output of the LPF to interface with the detectors.
The output of the LPF tracks changes at the input of the LPF when the changes occur over a relatively long time period in view of the selected time constant. However, the output of the LPF does not track changes (i.e., transients) that occur over a relatively short time period. Therefore, the detectors see differences between the switching regulator output voltage and the LPF output voltage during transients, and the transient recovery circuit responds appropriately. The transient recovery circuit also adapts to operation at a new switching regulator output voltage because the LPF output eventually tracks the new switching regulator output voltage.
In an alternate embodiment, the comparing reference generator is a Digital-to-Analog Converter (DAC). The DAC can be digitally programmed to provide a desirable comparing reference voltage to the detectors. For example, the output of the DAC is set to correspond to the expected value of the switching regulator during steady-state operation. In one embodiment, a slow clock is provided to update the DAC.
In one embodiment, the detectors include comparators with hysteresis to prevent high frequency oscillations at the detectors' respective output

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