Stacked semiconductor device and method of producing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S686000, C257S723000, C257S737000, C257S778000, C361S719000

Reexamination Certificate

active

06777799

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor devices and methods of producing the semiconductor devices, and, more particularly, to a stacked semiconductor device having a plurality of semiconductor chips stacked as one package and a method of producing such a stacked semiconductor device.
2. Description of the Related Art
In recent years, portable electronic devices such as mobile telephones and non-volatile memory media such as IC memory cards have been becoming smaller and smaller. Along with this trend, there have been demands for devices and memory media having a smaller number of components and a smaller size. Accordingly, it is desired to develop a technique of effectively packaging semiconductor chips that are main components constituting those electronic devices and memory media. Examples of such packages that satisfy the above demands include a chip scale package (CSP) that is almost as small as a semiconductor chip and a multi-chip package (MCP) that accommodates a plurality of semiconductor chips in one package.
The CSP or MCP is realized by stacking and turning a plurality of semiconductor chips into one package. This technique is represented by a stacked multi-chip package (S-MCP).
FIG. 1
shows the structure of a conventional S-MCP in which two semiconductor chips are stacked. As shown in
FIG. 1
, a semiconductor chip
2
is mounted on a substrate
4
, another semiconductor chip
6
that is smaller than the semiconductor chip
2
is stacked on the semiconductor chip
2
. Electrodes of the semiconductor chips
2
and
6
are connected to the pads of a substrate
4
by bonding wires
8
, and the pads of the substrate
4
are electrically connected to external connecting terminals
10
. The semiconductor chips
2
and
6
, and the bonding wires
8
are encapsulated by an encapsulation resin
12
.
A stacked CSP has a stacked structure to that of the S-MCP shown in FIG.
1
.
In the above conventional S-MCP, however, the upper semiconductor chip
6
must be smaller than the lower semiconductor chip
2
. The upper semiconductor chip
6
needs to be small enough not to cover the electrodes of the lower semiconductor chip
2
. On the other hand, if the upper semiconductor chip
6
is much too smaller than the lower semiconductor chip
2
, the distance between the electrodes of the upper semiconductor chip
6
and the pads of the substrate
4
becomes too long to perform a proper wire bonding operation.
FIGS. 2A
to
2
D show the positional relationship between the upper semiconductor chip and the lower semiconductor chip.
FIG. 2A
shows the positional relationship between two properly stacked semiconductor chips. More specifically, the upper semiconductor chip
6
is small enough not to cover the electrodes of the lower semiconductor chip
2
, and the electrodes of the upper semiconductor chip
6
and the electrodes of the lower semiconductor chip
2
can be connected to the pads of the substrate
4
by bonding wires
FIG. 2B
shows semiconductor chips that cannot be stacked. More specifically, the upper semiconductor chip
6
is almost as large as the lower semiconductor chip
2
in FIG.
2
B. If the upper semiconductor chip
6
is stacked on the lower semiconductor chip
2
, the upper semiconductor chip
6
will cover the electrodes of the lower semiconductor chip
2
, resulting in a failure in the wire bonding of the electrodes of the lower semiconductor chip
2
.
FIG. 2C
shows an example in which the two semiconductor chips can be stacked, but there is a problem with the wire bonding. More specifically, since the upper semiconductor chip
6
is much smaller than the lower semiconductor chip
2
in
FIG. 2C
, the distance between the electrodes of the upper semiconductor chip
6
and the pads of the substrate
4
becomes too long to perform a proper wire bonding process. Even if the wire bonding is successful, the bonding wires
8
are so long that it needs to be bent. In such a case, the bent portion might touch other components in the surrounding area, resulting in other problems.
FIG. 2D
shows an example in which the two semiconductor chips can be stacked, but the package size becomes too large. More specifically, in
FIG. 2D
, the upper semiconductor chip
6
can be stacked on the lower semiconductor chip
2
, without covering the electrodes of lower semiconductor chip
2
. However, the upper semiconductor chip
6
is too large in width, resulting in sticking out from the lower semiconductor chip
2
to a great extent. In this structure, the package cannot be made smaller in size. Also, since the sticking out portions of the upper semiconductor chip are not supported from below, the upper semiconductor chip
6
might be damaged by a pressing force caused by the capillary of a wire bonder pressed against the electrodes of the upper semiconductor chip
6
.
As described above, in the conventional S-MCP, semiconductor chips of the same size (i.e., of the same type) cannot be stacked. As the sizes of the semiconductor chips that can be stacked are limited, the types of the semiconductor chips that can be employed in the S-MCP are also limited.
Examples of the method of stacking semiconductor chips of the same type include a method of bonding two reverse semiconductor chips. In this method, the reverse sides of both reverse semiconductor chips are bonded to each other, so that the electrodes are symmetrically arranged. However, two different types of masks are required in the production process of such reverse semiconductor chips, resulting in high production costs.
In a case of rectangular semiconductor chips, the semiconductor chips of the same type can be rotated by 90 degrees with each other and arranged in a cross-like form. However, there still is the same problem as described above with reference to FIG.
2
D.
SUMMARY OF THE INVENTION
A general object of the present invention is to provide stacked semiconductor devices and methods of producing the semiconductor devices in which the above disadvantages are eliminated.
A more specific object of the present invention is to provide a stacked semiconductor device in which a plurality of semiconductor chips of desired sizes are stacked as one package.
Another specific object of the present invention is to provide a method of producing such a semiconductor device.
The above objects of the present invention are achieved by a stacked semiconductor device which comprises:
a first substrate that has external connecting terminals;
first terminals that are placed on a surface of the first substrate opposite to a surface of the first substrate on which the external connecting terminals of the first substrate are formed;
at least one first semiconductor chip that is mounted on the first substrate;
a second substrate that is placed on the first semiconductor chip;
at least one second semiconductor chip that is mounted on the second substrate; and
second terminals that are formed on the second substrate and electrically connected to at least one of the first semiconductor chip and the second semiconductor chip, the second terminals being connected to the first terminals by wire bonding.
According to the above-mentioned invention, one of the first and second semiconductor chips is electrically connected directly to the first substrate provided with the external connecting electrodes, and the other one is electrically connected to the first substrate via the second substrate. Accordingly, even if the first and second semiconductor chips are of the same size, one of the semiconductor chips can be connected directly to first terminals of the first substrate, while the other can be electrically connected to the first substrate via second terminals of the second substrate by wire bonding. Also, if the second semiconductor chip is much smaller than the first semiconductor chip, the first semiconductor chip can be connected directly to the first terminals of the first substrate by wire bonding, and the second semiconductor chip can be electrically connected to the first

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