Partial frequency offset digital upconversion

Details Partial frequency offset digital upconversion Partial frequency offset digital upconversion

2000-10-17

2004-08-03

Vo, Don N. (Department: 2631)

Pulse or digital communications

Transmitters

Quadrature amplitude modulation

C375S302000, C375S308000, C455S118000

Reexamination Certificate

active

06771710

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to a method of and an apparatus for upconverting a (complex) phase and amplitude modulated baseband signal to a signal at an intermediate frequency. More particularly, the present invention pertains to an apparatus for and a method of upconversion of a complex baseband signal having an in-phase component and a quadrature component, utilizing a single channel for the upconversion to the intermediate frequency instead of two separate channels. By implementing the present invention on a gate array, a great savings in configurable logic blocks (CLBs) is obtained.
BACKGROUND OF THE INVENTION
VHF data radio transmitters, for example as utilized in commercial airliners, requires conversion of a complex baseband signal to an intermediate frequency. Previous apparatus for and methods of achieving this have utilized two parallel channels to upconvert the in-phase and the quadrature components of the baseband signal. Each channel is sampled at, for example, 52.5 kilosamples per second (KSPS) and must be resampled at 50 megasamples per second (MSPS) before being mixed to an intermediate frequency of, for example, 21.4 MHz. Using existing apparatuses and methods, the output spectrum of such a signal is centered typically around 21.4 MHz, with an undesired component at 7.2 MHz. This undesired component can be removed by an intermediate frequency filter. However, to obtain high speed digital upconversion, use of configurable logic blocks, such as gates, is desirable, for example, field programmable gate array (FPGA) hardware. Existing techniques generally require a large number of logic blocks, generally more logic blocks than are available in present day FPGA chips. The two channels could be combined onto a single channel and reseparated after upsampling, with, for example, a Hilbert transform used to do this. However, it is difficult to implement this in hardware, and the size of the Hilbert transform filter operating at, for example, 50 MSPS would be prohibitive. In addition, there is an undesirable loss in fidelity.
SUMMARY OF THE INVENTION
The present invention is an apparatus for and a method of upconverting a (complex) phase and possible amplitude modulated baseband signal for radio transmission, also known in the industry as Quadrature Amplitude Modulation (QAM). The two components of the baseband signal consisting of an in-phase component I and a quadrature component Q, are to be upconverted to a desired real signal at a frequency f
d
hz, (normally called the IF or intermediate frequency signal). A subsequent conversion to a higher RF carrier frequency may occur after this process. This invention utilizes to a high degree a single channel for the upconversion process before the signal has been fully upconverted to the desired (IF) frequency f
d
in order to reduce the processing complexity in a digital upconverter. In accordance with the present invention, at least one of the two (complex) components is upconverted to a frequency f
2
hZ (which is small compared to the IF frequency f
d
and falls within the bandpass of the upconverter process) and is then added in a non-overlapping (in frequency) manner to the other component with the result that all modulation information is conveyed by a single (real) signal. The resulting real signal may consist of either 1) the sum of the baseband Q component added to the I component upconverted to f
2
or 2) the I and Q baseband information modulated on a very low carrier frequency of f
2
hZ such that the partially upconverted signal spectrum lies within the digital upconversion bandpass region. The second upconversion to the desired (IF) frequency f
d
is made on the partially upconverted real signal. Undesired sidebands are removed by an IF filter.
The appartus of the present invention can be implemented on a gate array, such as a field programmable gate array, which will result in a realization with a reduced number of configurable logic blocks (CLBs) compared to upsampling both I and Q to a high sample rate (50 Mhz for example) followed by modulation of the IF carrier. Thus this invention facilitates the implementation of a digital upconverter using logic gate arrays.


REFERENCES:
patent: 4583048 (1986-04-01), Gumacos et al.
patent: 5574671 (1996-11-01), Young et al.
patent: 5898338 (1999-04-01), Proctor et al.
patent: 6549544 (2003-04-01), Kroeger et al.

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