Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-01-17
2004-06-22
Norton, Nadine (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S709000, C438S710000
Reexamination Certificate
active
06753261
ABSTRACT:
TECHNICAL FIELD
The present invention generally relates to detecting defects on a wafer during semiconductor processing. In particular, the present invention relates to defect detection during plasma etching via an in-situ chemical composition monitor.
BACKGROUND ART
In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities there has been and continues to be efforts toward scaling down the device dimensions on semiconductor wafers (e.g., at submicron levels). In order to accomplish such high device packing density, smaller and smaller features sizes are required. This may include the width and spacing of interconnecting lines, spacing and diameter of contact holes and the surface geometry such as corners and edges of various features.
The requirement of small features with close spacing between adjacent features requires high resolution photolithographic processes. In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the resist and an exposing source (such as optical light, x-rays, etc.) illuminates selected areas of the surface through an intervening master template, the mask, for a particular pattern. The lithographic coating is generally a radiation-sensitive coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive image of the subject pattern. Exposure of the coating through a photomask causes the image area to become either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer.
The ability to reduce the size of computer chips while increasing packing densities and performance is driven by lithography technology, particularly at critical layers such as trench, polysilicon, contact/via and metal layers. Due to the large number of critical masking steps in a modern semiconductor device fabrication process and the inherent ability to impact pattern fidelity, lithographic defects are particularly dangerous. Defect detection and defect control at these critical layers is even more important at deep sub-micron levels since these defects often act as micro-masks during etching, thereby directly affecting pattern fidelity. Micro-masking defects at the critical layers are often killers. That is, they are often destructive to wafer structure and performance, resulting in circuit failure and yield loss.
Unfortunately, not all lithographic defects as well as other defects (e.g., flakes present in an etch chamber) can be detected on wafers before an etching process takes place (e.g., plasma etch process). Thus, there is an unmet need to non-invasively detect, control and mitigate the presence of defects which may be present before, during and/or after a plasma etch process.
SUMMARY OF THE INVENTION
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a system and a method for in-situ monitoring and detecting the presence of chemical elements which may be found in contaminants (i.e., defects) on a wafer structure. In particular, the present invention allows for the detection and identification of contaminant defects, including possible sources or causes of defect formation. For example, the presence of carbon, calcium and/or sulfur may indicate the presence of photoresist residue; thus the photoresist removal process may be inadequate, insufficient, or flawed and may require further diagnostic procedures to determine a more precise cause for the flawed process. Likewise, the presence of aluminum or tungsten may indicate the presence of etch chamber flakes on the layer; and the presence of nickel may indicate the presence of residue from an SOI substrate on the layer. Such contaminant defects may form at or near a surface of the wafer but more importantly, at critical layers of a semiconductor structure.
The present invention also provides a chemical tracing monitoring system in which plasma discharge is used to detect chemical elements commonly found in defects and to detect high defect excursions (i.e., high defect densities), both of which may adversely affect product yield and circuit performance.
One aspect of the present invention relates to a method for monitoring in-situ a wafer's chemical composition at or near a surface of the wafer during plasma etch to detect defects. The method includes the steps of providing a semiconductor substrate comprising at least one top layer, wherein the semiconductor substrate comprises at least one chemical-containing contaminant; subjecting the semiconductor substrate to a plasma etch process, whereby at least a portion of the top layer is removed; during the plasma etch process, detecting for a presence of the chemical-containing contaminant using one of an Auger Electron Spectroscopy system or Energy Dispersive X-ray Analysis system; and if present, determining whether the presence of the chemical-containing contaminant exceeds a threshold limit.
Another aspect of the present invention relates to a system for monitoring in-situ a wafer's chemical composition at or near a surface of the wafer during plasma etch to detect defects. The system includes a semiconductor substrate comprising at least one top layer, wherein the semiconductor substrate comprises at least one chemical-containing contaminant; a plasma etch chamber in which the wafer is placed to undergo a plasma etch process; a defect detector operatively coupled to the plasma etch chamber and comprising one or more sensor systems, the one or more sensor systems being at least one of an Auger Electron Spectroscopy system or an Energy Dispersive X-ray Analysis system, wherein the defect detector detects the chemical-containing contaminant; a defect analyzer operatively coupled to the defect detector for determining whether the presence of the chemical-containing contaminant exceeds a threshold limit; and a fabrication process controller operatively coupled to the defect analyzer for determining whether to the fabrication process or to continue the fabrication process.
Yet another aspect of the present invention relates to a method for monitoring in-situ a wafer's chemical composition at or near a surface of the wafer during plasma etch to detect defects. The method involves the steps of providing a semiconductor substrate comprising at least one top layer, wherein the semiconductor substrate comprises at least one chemical-containing contaminant; subjecting the semiconductor substrate to a plasma etch process, whereby at least a portion of the top layer is removed; during the plasma etch process, detecting for a presence of the chemical-containing contaminant using one of an Auger Electron Spectroscopy system or Energy Dispersive X-ray Analysis system; and if present, suspending the semiconductor fabrication process when the at least one chemical-containing contaminant exceeds a threshold limit.
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Halliyal Arvind
Phan Khoi A.
Singh Bhanwar
Amin & Turocy LLP
Deo Duy-Vu
Norton Nadine
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