Parallel/serial conversion circuit, light output control...

Coded data generation or conversion – Digital code to digital code converters – Parallel to serial

Reexamination Certificate

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C341S100000, C369S059200, C369S059110, C369S059120, C369S059240

Reexamination Certificate

active

06816095

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a parallel/serial conversion circuit for converting parallel signal input to a serial pulse signal and outputting the same, a light output control circuit for controlling a light output from a light source for emitting various types of information to a rewritable optical recording medium, etc., such as a phase change type optical disk, and an optical recording apparatus.
BACKGROUND ART
In recent years, advances have been made in increasing the speeds of a variety of electronic apparatuses. For example, in an optical recording apparatus for writing information on an optical disk, an increase in the speed of the conversion operation is being sought for the parallel/serial conversion circuit (hereinafter called the “P/S circuit”) that converts the recording data from parallel signals to a serial signal and outputs the results to a laser driver.
However, when trying to increase the speed of the conversion operation in a P/S circuit, since the serial signal after parallel/signal conversion becomes a super high speed, a super high speed clock is required for outputting the serial signal. Increasing the speed of the clock ends up creating obstacles in technology and cost.
DISCLOSURE OF THE INVENTION
A first object of the present invention is to provide a parallel/serial conversion circuit able to realize higher speed and higher accuracy at a low cost without using a super high speed clock.
A second object of the present invention is to provide a light output control circuit and an optical recording apparatus using this parallel/serial conversion circuit to optimize waveform control of a serial output pulse signal with a high speed and a high accuracy.
To achieve the objects, a first aspect of the present invention is a parallel/serial conversion circuit for converting parallel signals input to a serial pulse signal and outputting the same, having a phase shifting means for shifting a phase of a reference clock pulse by increments of 1
width of a pulse width, a fine width pulse generating means for receiving as input two phase shift pulses among the phase shift pulses shifted by the phase shifting means and generating a fine width pulse from a phase difference between the two, and a serial signal generating means for serially adding the fine width pulses generated by the fine width pulse generating means corresponding to the parallel signal input and outputting a serial pulse signal.
A second aspect of the present invention is a light output control circuit which controls a light output of a light source for emitting predetermined data light to an optical medium, having a light source driver that drives the light source in response to the serial pulse signal and a parallel/serial conversion circuit which receives as input parallel signals based on waveform data corresponding to light data to be emitted by the light source, converts the parallel signals to a serial pulse signal, and outputs the same to the light source driver, the parallel/serial conversion circuit having a phase shifting means for shifting a phase of a reference clock pulse by increments of 1
width of a pulse width, a fine width pulse generating means for receiving as input two phase shift pulses among the phase shift pulses shifted by the phase shifting means and generating a fine width pulse from a phase difference between the two, and a serial signal generating means for serially adding the fine width pulses generated by the fine width pulse generating means corresponding to the parallel signal input and outputting a serial pulse signal.
Preferably, it further has a waveform data memory for storing waveform data corresponding to data to be emitted by the light source, an accessing means for receiving as input the data to be emitted by the light source, judging the address of the waveform data memory corresponding to the input data, and accessing the waveform data memory, and a decoding means for decoding the waveform data read from the waveform data memory by the accessing means and outputting parallel signals which indicate the pulse waveform data to a parallel/serial conversion circuit.
Further, preferably, the fine width pulse generating means generates the fine width pulse from two adjacent phase shift pulses among the phase shifted pulses shifted by the phase shifting means.
Further, it has a changing means for receiving as input two adjacent phase shift pulses among the phase shift pulses shifted by the phase shifting means and changing their levels to different levels; and the fine width pulse generating means generates the fine width pulse from the two phase shift pulses changed in level by the level changing means.
Further, in the present invention, the phase shifting means includes a ring oscillator connecting a plurality of cells in a ring.
Preferably, the phase shifting means includes a ring oscillator connecting a plurality of delay cells in a ring, and the plurality of delay cells are laid out so as to make delays cells which become odd-numbered stages and even-numbered stages when connected in a ring face each other and so that interconnects which connect them become approximately equal.
A third aspect of the present invention is an optical recording apparatus for outputting a light source drive signal to a light source driver which writes data to an optical recording medium based on recording data indicating a length of a mark to be recorded on the optical recording medium, having a parallel/serial conversion circuit for receiving as input parallel signals based on waveform data read from a waveform data memory corresponding to a length of a mark recorded on the optical recording medium, converting the parallel signals to a serial pulse signal, and outputting the same to the light source driver, the parallel/serial conversion circuit having a phase shifting means for shifting a phase of a reference clock pulse by increments of 1
width of the pulse width, a fine width pulse generating means for receiving as input two phase shift pulses among the phase shift pulses shifted by the phase shifting means and generating a fine width pulse based on a phase difference between the two, and a serial signal generating means for serially adding the fine width pulses generated by the fine width pulse generating means corresponding to the parallel signal input and outputting a serial pulse signal.
According to the parallel/serial conversion circuit of the present invention, since it shifts a phase of a reference clock pulse by increments of 1
width of the pulse width, generates a fine width pulse from the phase difference between two phase shift pulses among the phase shift pulses, serially adds the fine width pulses corresponding to the parallel signal input, and outputs a serial pulse signal, it is possible to realize a higher speed and a higher accuracy of the P/S conversion at a low cost without using a super high speed clock.
Further, according to the present invention, when receiving as input parallel signals based on waveform data read from a waveform data memory corresponding to a length of a mark to be recorded on an optical recording media and converting these parallel signals to a serial signal by a parallel/serial conversion circuit and outputting the same to a light driver, since it shifts the phase of a reference clock pulse by increments of 1
width of the pulse width, generates a fine width pulse from the phase difference between two phase shift pulses among the phase shift pulses, serially adds the fine width pulses corresponding to the parallel signal input, and outputs a serial pulse signal, it is possible to realize a higher speed and a higher accuracy of P/S conversion at a low cost without using a super high speed clock and optimize waveform control of a pulse signal output to a light source driver for high speed and high accuracy.


REFERENCES:
patent: 5150351 (1992-09-01), Ohno et al.
patent: 5327411 (1994-07-01), Iwasa et al.
patent: 5587980 (1996-12-01), Kablau et al.
patent: 5642343 (1997-06-01), Toda et al.
patent: 6529466 (2003

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