Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2002-08-22
2004-11-09
Tang, Minh N. (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S762010, C438S017000
Reexamination Certificate
active
06815970
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to integrated circuits, and more particularly to a method of measuring the effects of negative bias temperature instability (NBTI).
BACKGROUND OF THE INVENTION
Recent advances in advanced submicron CMOS technologies have been accompanied by various reliability phenomena. One such phenomena is referred to as negative bias temperature instability (NBTI), and has an impact on lifetime reliability of MOSFET devices. As oxides are further scaled, unchecked NBTI could become a dominant failure mechanism.
The “instability” in NBTI refers to parameter drift observed in a PMOS transistor when a negative bias is applied to the gate of the transistor. The resulting instability is evidenced by a decrease in the saturation drive current, Idsat, and an increase in the magnitude of the threshold voltage, Vt. Equivalently, a parameter shift occurs when the gate is grounded and a positive bias exists on the source/drain and well, such as in a CMOS inverter circuit.
SUMMARY OF THE INVENTION
One aspect of the invention is a method of testing an integrated circuit to determine the effect of negative bias temperature instability (NBTI). A DC stress voltage is applied at the voltage supply input of the circuit, the DC stress voltage being appropriate for inducing NBTI degradation on transistors within the circuit. All circuit inputs and outputs are set at a known voltage, by being grounded or at a stress voltage. The circuit is held at the DC stress voltage for a DC stress period. After the DC stress period, measurements of at least one electrical parameter of the circuit, such as its minimum operating voltage, are taken. This cycle of stressing and measuring the circuit may be repeated for as many iterations are desired to provide an indication of circuit reliability.
An advantage of the invention is that it provides an easy test at the product or circuit level. It permits convenient assessment of the impact of NBTI on product or circuit performance. As a result of the static (non clocked) input NBTI effects are isolated from the effects of CHC (channel hot carrier) or other degradation that occurs when the circuit is in a dynamic operating mode.
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Vincent, E., “A Procedure for Measuring P-Channel MOSFET Negative BIAS Temperature Instabilities,” STMicroelectronics, Oct. 2000, 13 pages.
Reddy Vijay
Rost Timothy A.
Brady III W. James
McLarty Peter K.
Tang Minh N.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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