Semiconductor device manufacturing: process – Electron emitter manufacture
Reexamination Certificate
2002-06-25
2004-06-22
Niebling, John (Department: 2812)
Semiconductor device manufacturing: process
Electron emitter manufacture
C438S478000
Reexamination Certificate
active
06753196
ABSTRACT:
The present application is based on Japanese Patent Application No. 2001-192573 and Japanese Patent Application No. 2001-290329 filed in Japan, the contents of which are fully incorporated herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of, and apparatus for, manufacturing a field emission-type electron source comprising a strong field drift layer so as to emit an electron beam by electric field emission.
2. Description of the Related Art
There is well known a field emission-type electron source (hereinafter, simply referred to as an “electron source”) in which a strong field drift layer (hereinafter, simply referred to as a “drift layer”) consisting of a porous semiconductor layer oxide (or nitride) is formed on one surface of an electrically conductive substrate, and a surface electrode is formed on the drift layer (for example, refer to Japanese Patent Application Publication No. 2966842, Japanese Patent Application Publication No. 2987140, and Japanese Patent Application Publication No. 3079086). As an electrically conductive substrate, for example, there are employed: a semiconductor substrate whose resistivity is comparatively close to conductivity of a conductor; a metal substrate; and a substrate having an electrically conductive layer formed on one surface of a glass substrate (insulating substrate) or the like.
For example, as shown in
FIG. 26
, in an electron source
10
′ of this type, a drift layer
6
′ consisting of an oxidized porous polycrystalline silicon layer is formed on a main surface of an n-type silicon substrate
1
that is an electrically conductive substrate. A surface electrode
7
is formed on the drift layer
6
′. An ohmic electrode
2
is formed on a back face of the n-type silicon substrate
1
. In an example shown in
FIG. 26
, a semiconductor layer
3
consisting of a non-doped polycrystalline silicon layer is interposed between the n-type silicon substrate
1
and the drift layer
6
′. However, there is proposed an electron source having the drift layer
6
′ formed on the main surface of the n-type silicon substrate
1
without interposing the semiconductor layer
3
.
In the electron source
10
′ shown in
FIG. 26
, electrons are emitted in accordance with the following process. First, a collector electrode
21
is disposed in opposite to the surface electrode
7
. While vacuuming is provided between the surface electrode
7
and the collector electrode
21
, a direct current voltage Vps is applied between the surface electrode
7
and the n-type silicon substrate
1
so that the surface electrode
7
becomes high in potential (positive polarity) relevant to the n-type silicon substrate
1
(ohmic electrode
2
). On the other hand, a direct current voltage Vc is applied between the collector electrode
21
and the surface electrode
7
so that the collector electrode
21
becomes high in potential relevant to the surface electrode
7
. When the direct current voltages Vps and Vc are properly set, electrons injected from the n-type silicon substrate
1
drift the drift layer
6
′, and is emitted trough the surface electrode
7
(the singly dotted chain line in
FIG. 26
indicates the flow of an electron “e” emitted through the surface electrode
7
). The surface electrode
7
is formed of a material with its small work function (for example, gold). The thickness of the surface electrode
7
is set to about 10 nm to 15 nm.
Here, a current flowing between the surface electrode
7
and the ohmic electrode
2
is referred to as a diode current Ips, and a current flowing between the collector electrode
21
and the surface electrode
7
is referred to as an emission current (emission electron current) Ie. At this time, as a rate (=Ie/Ips) of the emission current Ie relevant to the diode current Ips increases, the electron emission efficiency is high.
In the electron source
10
′, even if the direct current voltage Vps applied between the surface electrode
7
and the ohmic electrode
2
is defined as a low voltage of about 10V to 20V, electrons can be emitted. In addition, in the electron source
10
′, the dependency in degree of vacuum in electron emission characteristics can be reduced, and electrons can be emitted constantly with high emission efficiency without generating a hopping phenomenon during electron emission.
In a process for manufacturing the electron source
10
′, the step of forming the drift layer
6
′ includes the film forming step, anodic oxidation processing step, and oxidizing step. In the film forming step, a non-doped polycrystalline silicon layer is deposited on one surface of the n-type silicon substrate
1
that is an electrically conductive substrate. In the anodic oxidation processing step, the polycrystalline silicon layer is anodically oxidized, whereby a porous polycrystalline silicon layer containing polycrystalline silicon grains and silicon nanocrystals is formed. In the oxidizing step, the porous polycrystalline silicon layer is oxidized in accordance with a rapid thermal oxidization technique, and thin oxide films are formed respectively on the surfaces of the grain and silicon nanocrystals. In the anodic oxidation processing step, a mixture liquid obtained by mixing hydrogen fluoride water solution and ethanol at 1:1 is employed as an electrolyte employed for anodic oxidation. In the oxidizing step, a lamp annealing device is employed. After a substrate temperature has been increased for a short time from room temperature to 900° C. in dry oxygen, the substrate is maintained at 900° C. for one hour, and the substrate is oxidized. Then, the substrate temperature is lowered to room temperature.
As shown in
FIG. 27
, the thus formed drift layer
6
′ is considered as being composed of: at least a columnar polycrystalline silicon grain
51
; a thin silicon oxide film
52
formed on a surface of the grain
51
; a silicon nanocrystal
63
with its nanometer order interposed across the grains
51
; and a silicon oxide film
64
formed on a surface of the silicon nanocrystal
63
and having its smaller film thickness than the crystalline particle size of the silicon nanocrystal
63
. That is, in the drift layer
6
′, the surface of each grain
51
contained in the polycrystalline layer before carrying out anodic oxidation processing is made porous, and a crystalline state is maintained at the center portion of each grain
51
.
Therefore, a majority of the electric field applied to the drift layer
6
′ is intensively applied to the silicon oxide film
64
. As a result, the injected electrons are accelerated by a strong electric field relevant to the silicon oxide film
64
, and drift among the grains
51
in an orientation indicated by the arrow A toward the surface. Thus, electron emission efficiency can be improved. Here, the electron source
10
′ utilizes a ballistic conducting phenomenon that occurs by setting the size (crystalline particle size) of the silicon nanocrystal
63
and the film thickness of the silicon oxide film
64
equal to or smaller than the film thickness (a degree of electron mean free path) when an electron tunneling phenomenon occurs. Electrons arrived at the surface of the drift layer
6
′ are considered as hot electrons. These electrons easily tunnels the surface electrode
7
, and are emitted into a vacuum. In the electron source
10
′ comprising the drift layer
6
′, a heat generated in the drift layer
6
′ during electron emission is radiated through the grain
51
. Thus, the heat generated in the drift layer
6
′ can be efficiently radiated, and an occurrence of a hopping phenomenon can be restricted.
As shown in
FIG. 28
, there is proposed an electron source
10
having an electrically conductive layer
12
formed on one surface of an insulating substrate
11
consisting of a glass substrate without employing an n-type silicon substrate as an electrically conductive substrate. In
FIG. 28
, like a constituen
Aizawa Koichi
Baba Toru
Hatai Takashi
Honda Yoshiaki
Ichihara Tsutomu
Greenblum & Bernstein P.L.C.
Lattin Christopher
Matsushita Electric & Works Ltd.
Niebling John
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