Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Light responsive structure
Reexamination Certificate
2001-11-02
2004-06-29
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Light responsive structure
C257S184000, C257S188000, C257S199000, C257S079000, C257S458000
Reexamination Certificate
active
06756613
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor devices, and more specifically to the structure of PIN photodiodes and APDs.
BACKGROUND OF THE INVENTION
For high-bit-rate, long-haul fiber-optic communications p-doped/intrinsic
-doped (PIN) photodiodes and avalanche photodiodes (APDs) are frequently used as photodetectors due to their high sensitivity and bandwidth. Planar and mesa structures are two commonly used configurations for PIN Photodiodes and APDs. Mesa structure PIN photodiodes and APDs are sometimes grown by molecular beam epitaxy (MBE) or metalorganic chemical vapor deposition (MOCVD). These fabrication techniques allow the thickness of the layers and the wafer to be accurately controlled.
Referring to
FIG. 1
, a mesa structure PIN
2
known in the prior art is shown. The structure includes a top metal contact
8
, two bottoms metal contacts
12
, a p-doped Indium Gallium Arsenide (InGaAs) ohmic contact layer
64
lattice matched to Indium Phosphide (InP), a p-doped InP layer
68
, an intrinsic narrow bandgap InGaAs absorption layer
76
lattice matched to InP, a n-doped InP layer
80
, and passivation regions
32
.
In fabrication after the layers
80
,
76
,
68
,
64
are sequentially deposited, the mesa structure
84
is formed by chemical etching through the p-doped layers
64
,
68
and the intrinsic absorption layer
76
. Next, the exposed sidewalls of the p-doped layers
64
,
68
and the intrinsic absorption layer
76
that define the mesa structure
84
are passivated with dielectric materials, such as SiO
2
or SiN
x
. As part of this process, defects are inevitably introduced into the p-doped layers
64
,
68
and the intrinsic absorption layer
76
. The intrinsic InGaAs absorption layer
76
has a low bandgap and the mesa etching introduced defects create extra intraband energy levels. These in turn lead to a high dark current. The dark current in InGaAs PIN photodiodes and APDs fabricated according to the above method is one factor in the generally low reliability of these devices. The low reliability of these devices includes low sensitivity and high noise. These disadvantages significantly restrict the use of InGaAs PIN photodiodes and APDs in optical communications systems.
Referring to
FIG. 2
, a planar structure PIN photodiode
4
known in the prior art is shown. The structure
4
includes a top metal contact
8
, two bottom metal contacts
12
, an intrinsic InGaAs layer
16
, an intrinsic InP layer
20
, an intrinsic absorption InGaAs layer
76
, a n-doped InP layer
28
, passivation regions
32
, a p-doped InGaAs diffusion region
36
, and a p-doped InP diffusion region
40
.
During fabrication of the planar structure PIN photodiode
4
, the n-doped InP layer
28
, the intrinsic InGaAs layer
76
, the intrinsic layer InP
20
, and the intrinsic InGaAs layer
16
are sequentially deposited. The p-doped regions
36
and
40
are then formed by diffusing, for example, Zinc (Zn) or Cadmium into the top central region of the device
4
. After the diffusion step, the top metal contact
8
and the passivation regions
32
are added.
Although avoiding the introduction of defects into the intrinsic InGaAs layer
76
during passivation, planar structure PIN photodiodes
4
have disadvantages in device performance and design flexibility. The introduction of the p-dopant by diffusion is not a precise process, and, therefore, the thickness of the p-doped regions
36
and
40
cannot be accurately controlled. In some instances the p-dopant diffuses into the intrinsic InGaAs layer
76
. In other instances the p-dopant does not diffuse completely through the intrinsic InP layer
20
, or even through the intrinsic InGaAs layer
76
. Another disadvantage of planar structure PIN photodiodes
4
is their higher parasitic capacitance. The parasitic capacitance exists between the conductive substrate and device pad. Mesa structure devices can avoid this problem, however, by employing a semi-insulating substrate.
An additional disadvantage of planar structure PIN photodiodes
4
is that their fabrication process is complex. In particular, the diffusion process requires that the surface of the layer to be doped be carefully prepared. A further disadvantage of planar structure PIN photodiodes
4
is the control of hazardous materials as part of the dopant diffusion. For example, in Zn diffusion, As, P, Zn
3
P
2
, and Zn
3
AS
2
, are heated to approximately 550 C. At this temperature, small evaporated and inhaled doses are lethal.
What is needed are PIN photodiodes and APDs that overcome the disadvantages of current PIN photodiodes and APDs.
SUMMARY OF THE INVENTION
In one aspect the invention relates to a high bandwidth shallow mesa semiconductor photodiode responsive to incident electromagnetic radiation. The photodiode includes an absorption narrow bandgap layer, a wide bandgap layer disposed substantially adjacent to the absorption layer, a first doped layer having a first conductivity type disposed substantially adjacent to the wide bandgap layer, and a passivation region disposed substantially adjacent to the wide bandgap layer and the first doped layer.
In one embodiment, the photodiode also includes a second doped layer disposed substantially adjacent to the absorption narrow bandgap layer. In another embodiment the photodiode also includes a third doped layer disposed substantially adjacent to the first doped layer and adapted to form an ohmic contact with a substantially adjacent metalization layer. In an additional embodiment, the photodiode also includes a second doped layer and an impact layer disposed substantially adjacent to the second doped layer and the absorption narrow bandgap layer. The ratio of the ionization coefficient for electrons relative to the ionization coefficient for holes for the impact layer is larger than the corresponding ratio for the absorption narrow bandgap layer, the wide bandgap layer, the first doped layer, and the second doped layer.
In a further embodiment, the first doped layer includes indium phosphide. In yet another embodiment, the absorption layer comprises indium gallium arsenide. In yet an additional embodiment, the wide bandgap layer varies in thickness from a deposition thickness t
1
to an etching thickness t
2
.
In another aspect the invention relates a method for fabricating high bandwidth shallow mesa semiconductor photodiode responsive to incident electromagnetic radiation. The method includes generating an absorption narrow bandgap layer, generating a wide bandgap layer disposed substantially adjacent to the absorption narrow bandgap layer, generating a first doped layer disposed substantially adjacent to the wide bandgap layer. The first doped layer has a first conductivity type. The method also includes etching a region of the first doped layer, etching a region of the intrinsic wide bandgap layer, and generating a passivation layer disposed substantially adjacent to the first doped layer and the intrinsic wide bandgap layer.
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patent: 5610416 (1997-03-01), Su et al.
patent: 6452221 (2002-09-01), Lai et al.
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Campbell et al. “High-Speed InP/InGaAsP/InGaAs Avalanche Photodiodes Grown by Chemical Beam Epitaxy,”IEEE J. Quantum Electron., vol. 24, No. 3, pp. 496-500, 1988.
Watanabe et al. “High-Speed and Low-Dark-Current Flip-Chip InAlAs/InAlGaAs Quaternary Well Superlattice APD's with 120 GHz Gain-Bandwidth Product,”IEEE Photon. Tech. Lett., vol. 5, No. 6, pp. 675-677, 1993.
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Multiplex, Inc.
Nguyen DiLinh
Pham Long
Testa Hurwitz & Thibeault LLP
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