Semiconductor element

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

Reexamination Certificate

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C257S192000, C257S197000, C257S198000

Reexamination Certificate

active

06781164

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor element, particularly usable for a field-effect transistor (FET), a high electron mobility transistor (HEMT), a heterojunction bipolar transistor (HBT) or the like.
2. Related Art Statement
With the recent development of cellular phone and optical communication techniques, low electric power consumable and high output electronic devices having high frequency properties are remarkably desired. As such an electronic device, conventionally, Si and GaAs devices have been employed. However, since these devices do not have sufficiently high frequency properties, a new high output electronic device is keenly desired.
In this point of view, a HEMT and a psudemorphic HEMT which are made of GaAs-based semiconductors are developed and practically used. Moreover, high performance electronic devices such as a HEMT and a HBT made of InP-based semiconductor have been researched and developed.
However, such a high performance electronic device is composed of plural semiconductor layers epitaxially grown on a given substrate, and has a very complicated structure. Moreover, micro processing techniques are required in fabricating the electron device, so that the manufacturing cost of the electronic device rises. In addition, the InP-based semiconductor is very expensive, so alternatives are desired.
In this point of view, recently, much attention is paid to a new electron device made of a GaN-based semiconductor. Since the bandgap of the GaN semiconductor is 3.39 eV, the GaN semiconductor can have a dielectric breakdown voltage tenfold as large as that of a GaAs semiconductor and a Si semiconductor. Moreover, because the GaN semiconductor can have a large electron saturated drift velocity, it can have a larger performance index as an electronic device than a GaAs semiconductor and a Si semiconductor. Therefore, a GaN semiconductor is prospected as a fundamental semiconductor for high temperature devices, high output devices and high frequency devices in engine controlling, electrical power converting and mobile communication techniques.
Particularly, since an electronic device with an HEMT structure made of an AlGaN or GaN semiconductor is developed by Khan et al. and published in “J. Appl. Phys. Lett.,” 63(1993), pp1214-1215, such an electronic device using GaN-based semiconductor has been intensely researched and developed all over the world. Such an electronic device is generally formed by epitaxially growing given semiconductor layers on a sapphire substrate.
However, since the lattice mismatch between the GaN-based semiconductor layer and the sapphire substrate is large, many misfit dislocations are created at the boundary between the semiconductor layer and substrate, and, propagated in the semiconductor layer. As a result, many dislocations on the order of 10
10
/cm
2
are created in the semiconductor layer, and thus, the electrical properties of the electronic device including the semiconductor layer are deteriorated. Therefore, under the present conditions, the performance of the electronic device made of a GaN-based semiconductor can not be sufficiently improved.
In order to improve the crystal quality of the GaN-based semiconductor layer, an attempt has been made to form a buffer layer between the semiconductor layer and the sapphire substrate or to employ a SiC substrate, a GaN substrate and other oxide substrates instead of the sapphire substrate, but the crystal quality of the GaN-based semiconductor layer formed on the substrate can not be sufficiently improved.
Moreover, an ELO (epitaxial layer overgrowth) technique, such as forming a strip mask made of SiO
2
, etc. on a substrate has been developed. In this case, misfit dislocations created at the boundary between the GaN-based semiconductor layer and the substrate are laterally propagated in the region above the strip mask, and thus, the dislocation density of the semiconductor layer is decreased in between the adjacent strip portions of the mask.
However, since the ELO technique requires a complicated process, the manufacturing cost of the electronic device rises. Moreover, since the GaN semiconductor layer must be formed thicker so as to cover the strip mask, the substrate may be warped. If the ELO technique is employed in the practical process for manufacturing electron devices including the GaN-based semiconductor layers, most of the substrates to be employed and constituting the electronic devices are warped and thus, broken. Therefore, the ELO technique can not be employed in the practical manufacturing process for the electronic device.
SUMMARY OF THE INVENTION
It is an object of the present invention to decrease the dislocation density of a an epitaxially grown semiconductor layer made of a nitride including at least one element selected from the group consisting of Al, Ga, and In, and thus, to provide a semiconductor element including a semiconductor layer usable as a practical device, such as a FET and a HEMT.
In order to achieve the above object, this invention relates to a semiconductor element (a first semiconductor element), substantially including a substrate, an underlayer epitaxially grown on the substrate and made of a first semiconductor nitride including at least elemental Al. The dislocation density of the underlayer is set to 10
11
/cm
2
or below, and the crystallinity of the underlayer is set to 90 seconds or below in full width at half maximum of an X-ray rocking curve at (002) reflection. A conductive layer is also included, epitaxially grown on the underlayer and made of a second semiconductor nitride including at least one element selected from the group consisting of Al, Ga and In. The dislocation density of the conductive layer is set to 10
10
/cm
2
or below, and the crystallinity of the conductive layer is set to 150 seconds or below in full width at half maximum of an X-ray rocking curve at (002) reflection.
This invention also relates to a semiconductor element (a second semiconductor element), substantially including a substrate, and an underlayer epitaxially grown on the substrate, made of a first semiconductor nitride including at least one element selected from the group consisting of Al, Ga and In. The dislocation density of the underlayer is set to 10
11
/cm
2
or below, and the crystallinity of the underlayer is set to 90 seconds or below in full width at half maximum of an X-ray rocking curve at (002) reflection. A carrier moving layer is also included, epitaxially grown on the underlayer, made of a second semiconductor nitride including at least one element selected from the group consisting of Al, Ga and In. The dislocation density of the carrier moving layer is set to 10
10
/cm
2
or below, and the crystallinity of the carrier moving layer is set to 150 seconds or below in full width at half maximum of an X-ray rocking curve at (002) reflection. Further, a carrier supplying layer is also included, epitaxially grown on the carrier moving layer and made of a third semiconductor nitride including at least one element selected from the group consisting of Al, Ga and In.
Moreover, this invention relates to a semiconductor element (a third semiconductor element), substantially including a substrate, and an underlayer, epitaxially grown on the substrate, made of a first semiconductor nitride including at least one element selected from the group consisting of Al, Ga and In. The dislocation density of the underlayer is set to 10
11
/cm
2
or below, and the crystallinity of the underlayer is set to 90 seconds or below in full width at half maximum of an X-ray rocking curve at (002) reflection. A first conductive layer of a first conduction type is provided, epitaxially grown on the underlayer and made of a second semiconductor nitride including at least one element selected from the group consisting of Al, Ga and In. The dislocation density of the first conductive layer is set to 10
10
/cm
2
or below, and the crystallinity of the first conductive layer is set to 150 seconds or below in full width

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