Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
1999-03-24
2004-02-24
Thomson, W. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C714S724000, C714S725000, C714S738000, C714S741000, C714S746000, C703S016000, C703S002000
Reexamination Certificate
active
06697773
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to computer aided design tools and techniques for the interactive design, implementation, and simulation of complex circuits and systems and more particularly, digital devices, modules, and systems.
BACKGROUND OF THE INVENTION
Present computer aided (CAD) systems for the design of electronic circuits, referred to as ECAD or electronic CAD systems, assist in the design of electronic circuits by providing a user with a set of software tools running on a digital computer. Typically, five major software program functions run on the ECAD system, a schematic editor, a compiler, a simulator, a verifier, and a layout program. The schematic editor program allows the user of the system to enter and/or modify a schematic diagram using the display screen, generating a net list (summary of connections between components) in the process. The compiler takes the net list as an input, and using a component data base puts all of the information necessary for layout, verification, and simulation into an object file or files. The verifier checks the schematic for design errors, such as multiple outputs connected together, overloaded signal paths, etc. And generates error indications if any such design problems exist. The simulator takes the schematic object file(s) and simulation models, and generates a set of simulation results, acting on instructions, initial conditions, and input signal values provided to it either in the form of a file or user input.
In order to simulate the performance of the circuit, it is necessary to run a simulator. A simulator is a software tool which operates on a digital representation, or simulation model, of a circuit, a list of input signals (stimuli) representing real inputs, and data about the performance characteristics of the represented circuit elements. The simulator then generates a numerical representation of the response of the circuit which can then be viewed either on a display screen in graphical form or as a list of values. Typically, the graphical representation is designed to produce an image similar to what one would see on an oscilloscope or logic analyzer screen monitoring a real circuit connected as described in the schematic diagram if the real inputs represented by the list in input signals were applied.
Simulation is often provided by utilizing simulation models at one or more of several different levels. Component level models attempt to describe the exact behavior of a specific component, such as a gate or transistor, when it is acted upon by a stimulus. Behavioral level models provide a simplified model of extremely complicated devices, such as microprocessors, or operational amplifiers. Such models, if simulated exactly on a transistor by transistor basis, would become prohibitive in terms of the size of their descriptions and the number of calculations and the amount of computing time required to completely simulate their function. In response, the behavioral model provides a logical or mathematical equation or set of equations describing the behavior of the component viewed as a “black box” also referred to as process blocks. Such models may either provide a very complete and accurate description of the performance of the modeled device, or a simple description of the types of signal one might expect the modeled device to produce. For example, a behavioral model of a microprocessor might provide the user with the capability of issuing various types of bus cycles, but not the capacity to actually simulate the execution of a program. The simulation model used by the simulator is usually derived from the output of the schematic editor by a schematic compiler, also making use of information about performance characteristics of the circuits stored in simulation libraries. Simulation libraries contain simulation characteristics of numerous circuit components.
Simulators often allow several different types of simulation. One type is a complete simulation run, where an initial set of conditions is specified, a set of input stimuli is defined, and the duration of the simulated run is specified. The simulator then operates on the data and produces a file of simulation results which may be displayed. Another type of simulation similar to the complete simulation run is an event termination run, whereby the simulation is run until a certain previously specified event occurs in the simulation results. The simulation may be terminated immediately at that point, or run for some simulated duration thereafter. One final type of simulation run is a stepped simulation run, whereby the current simulation may be “stepped” by one unit of time, or once clock cycle, or some other similar criterion. During simulation, the simulator needs to query a conditional statement asking how to proceed. One difficulty with conventional representations of digital circuits suitable for simulation (such as process blocks) is that all conditions are typically merged together, therefore being what is referred to as atomic in nature. By atomic, it is meant that the process blocks can not be analyzed beyond the inputs (stimuli) provided and the corresponding outputs generated. This inability to observe simulation signals from within the process block itself restricts the ability of the circuit designer to adequately characterize, debug, and/or analyze the complex digital circuit being simulated.
For this reason, it is desirable to find methods and mechanisms for use in behavioral simulations of complex circuit circuits that do not merge conditions and thereby provides improved characterization and debugging.
SUMMARY OF THE INVENTION
The present invention provides a method and mechanism for simulating complex digital circuits using hybrid control and data flow representations. Specifically, the invention provides a method of controlling the simulation of a digital circuit in such a way that desired functions are annotated for subsequent analysis. In a particularly preferred embodiment, the method selectively chooses the functions to be subsequently analyzed from within process blocks in order to run digital circuits in a non-atomic fashion.
One aspect of the invention provides a method of conducting a behavioral simulation of one or more process blocks in an electronic design. The method includes receiving an assignment decision diagram representation of the process block that includes one or more control nodes for maintaining control flow through the simulator. In this way, one or more break points are created. A simulation of the assignment decision diagram representation is run such that the simulation may be stopped when control nodes are encountered so that the state of the simulation may be observed.
Another aspect of the invention provides a behavioral simulator for conducting a behavioral simulation of one or more process blocks in an electronic design. The simulator displays the simulation results of an assignment decision representation of the process block and stops the simulation when encountering control nodes in the assignment decision representation so that the state of the simulation can be observed.
These and other features and advantages of the present invention will be further described in the following description of the invention in conjunction with the associated figures.
REFERENCES:
patent: 5490266 (1996-02-01), Sturges
patent: 5513118 (1996-04-01), Dey et al.
patent: 5519627 (1996-05-01), Mahmood et al.
patent: 5623418 (1997-04-01), Rostoker et al.
patent: 5673198 (1997-09-01), Lawman et al.
patent: 5848236 (1998-12-01), Dearth et al.
patent: 5870608 (1999-02-01), Gregory
patent: 5920711 (1999-07-01), Searight et al.
patent: 5937190 (1999-08-01), Gregory et al.
patent: 5991533 (1999-11-01), Sano et al.
patent: 6044211 (2000-03-01), Jain
patent: 6173241 (2001-01-01), Trimberger
patent: 6212650 (2001-04-01), Guccione
patent: 6269467 (2001-07-01), Chang et al.
patent: 6317860 (2001-11-01), Heile
patent: 6421808 (2002-07-01), McGeer et al.
Danial D. Gajski, Tadatoshi Ishii, Viraphol Chaiyakul, Hsiao-Ping
Karchmer David
Stellenberg Daniel S.
Altera Corporation
Beyer Weaver & Thomas LLP
Craig Dwin
Thomson W.
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