Frame timing synchronization method

Pulse or digital communications – Spread spectrum – Direct sequence

Reexamination Certificate

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C375S343000

Reexamination Certificate

active

06754257

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a frame timing synchronization method of establishing frame synchroization in a CDMA (Code Division Multiple Access) communication system.
2. Description of the Prior Art
In general, communication is performed by using a format predetermined between the transmitting and receiving sides. On the receiving side, to properly receive information, it is necessary to find frame boundaries in a reception signal, i.e., establish frame synchronization.
In a CDMA communication system, which has recently attracted attention, in general, there is a known temporal relationship between a frame boundary and a spreading code. The receiving side cannot decode information without knowing a spreading code and its timing. This makes it more important to establish frame synchronization on the receiving side.
In W-CDMA (Wide band-CDMA) that is being standardized by ARIB (Association of Radio Industries and Businesses), as spreading codes in a forward link, i.e., a channel from a base station to a terminal station, long and short codes are used. The long code is a code having the same period as that of a frame. The short code is a code that has a shorter period than the long code and is used to make the channel have orthogonality with respect to another forward physical channel transmitted from the same base station. A forward link from the base station to the terminal station is spread by the product of long and short codes.
To facilitate establishment of frame synchronization at the terminal station, one of the symbols of a slot is not cyclically spread by a long code but is spread by only a known short code. This symbol spread by only the known short code is called a long code mask symbol. The short code used to spread the long code mask symbol need not be identical to a short code used to spread other symbol portions, and is only required to be known. The terminal station establishes frame synchronization by using this long code mask symbol and the known short code.
In this case, the following procedures are executed to finally establish synchronization with a spreading code.
(1) Despreading is sequentially performed in units of chips by using a known short code. The position of a long code mask symbol is then detected by searching for a start point at which a large correlation value is obtained.
(2) A long code type and frame timing (long code start phase) are detected on the basis of the detected long code mask symbol.
FIG. 7
shows an example of the format of a frame in a forward communication link. Referring to
FIG. 7
, one frame=N slots, one slot=M symbols, and one symbol=P chips. Only M−1 symbols of one slot are spread by long and short codes, and the remaining one symbol is spread by only a short code. If G types of spreading codes (long codes×short codes) are used as a whole, and the reception oversampling count is S (samples/chip), uncertainty corresponding to G×N×M×P×S must be eliminated to establish frame synchronization. That is, G×N×M×P×S correlation computations are required.
According to the procedures of establishing spreading code synchronization in the prior art, uncertainty is reduced not by Checking all G×N×M×P×S but by checking them stepwise as follows:
G×N×M×P×S→G×N
  (1)
G×N→
1
  (2)
In practice, in step (2) as well, a frame format is designed to allow the use of a method of eliminating uncertainty stepwise. However, the present invention is not directly associated with this technique, and hence a description thereof will be omitted.
In step (1), however, M×P×S correlation computations are required to result in increases in hardware size and current consumption. In the case of W-CDMA, since N=16, M=10, and P=256, even if S=1, 2,560 correlation computations are required in step (1).
As described above, in the conventional frame timing synchronization method, a large computation amount is required to establish frame timing synchronization.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above situation in the prior art, and has as its object to provide a frame timing synchronization method which can reduce the computation amount required to establish frame timing synchronization.
In order to achieve the above object, according to the principal aspect of the present invention, there is provided a frame timing synchronization method of establishing frame synchronization when a reception frame is constituted by a portion modulated (spread) by BPSK (Binary Phase Shift Keying) and a portion modulated (spread) by multilevel PSK (Phase Shift Keying) in which a phase at a signal point after modulation (spreading) exceeds phases at two points, and relative positions of the portion modulated (spread) by BPSK and a portion modulated (spread) by a scheme other than BPSK are known in the reception frame, comprising the steps of:
obtaining an integration result, a plurality of number of times, by integrating the square of a complex reception sample for plural samples period from an arbitrary integration start point while shifting an integration start sample at predetermined intervals;
making a search for a maximum integration result from the plurality of integration results;
demodulating (despreading) complex reception samples included in a predetermined range having an integration start point as a center corresponding to the maximum integration result while setting the respective samples as demodulation (despreading) start points; and
establishing frame synchronization by detecting the portion modulated (spread) by BPSK from the obtained demodulation (despreading) results.
As is obvious from the principal aspect, according to the present invention, a one-symbol complex reception sample is squared, and a start point at which the maximum integration result is detected, thereby approximately determining a portion modulated (spread) by BPSK and a portion modulated (spread) by mutlilevel PSK in which the phase at a signal point after modulation (spreading) by QPSK or the like exceeds phases at two points. Frame synchronization is then established by sequentially demodulating (despreading) only an integration result determined as an integration result containing a portion modulated (spread) by BPSK.
The computation amount can therefore be greatly reduced as compared with the prior art in which all reception frames are sequentially demodulated (despread) to establish frame synchronization.
The present invention also has the following auxiliary aspects.
The portion spread by BPSK in the principal aspect is a search channel (SCH) symbol in W-CDMA system that is specified by 3
rd
Generation Partnership Project (3GPP).
Multilevel PSK in the principal aspect is QPSK.
The step of squaring the complex reception sample in the principal aspect is implemented by using a table in which results obtained by squaring complex reception samples are stored in advance.
The principal aspect further comprises the step of repeating, a plurality of times, the step of obtaining an integration result, a plurality of number of times, by squaring and integrating the complex reception sample while shifting an integration range at predetermined intervals, and accumulating a plurality of integration results.
In the present invention, the reliability of an integration result is improved by repeatedly obtaining an integration result and accumulating the resultant values.
The principal aspect further comprises the step of establishing frame synchronization by sequentially demodulating (despreading) a reception frame in units of chips when frame synchronization cannot be established by the step of performing demodulation (despreading) at start points within a predetermined demodulation (despreading) start point range centered on an integration start point at which a maximum integration result is

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