Post-etch cleaning treatment

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

Reexamination Certificate

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Details

C438S745000, C438S750000

Reexamination Certificate

active

06692976

ABSTRACT:

FIELD OF THE INVENTION
The present disclosure relates to post-etch cleaning treatments. More particularly, the present disclosure relates to post-etch cleaning treatments well-suited for removing damaged regions that form on the ferroelectric region of a FeRAM.
BACKGROUND OF THE INVENTION
Ferroelectric random access memory (FeRAM) is a non-volatile, low power, memory that has the potential to replace electrically erasable, programmable read only memory (EEPROM), embedded Flash, embedded dynamic random access memory (DRAM), non-cache static random access memory (SRAM), and the like.
FIG. 1
illustrates a conventional FeRAM capacitor stack. As shown in this figure, the FeRAM typically comprises a top electrode, a ferroelectric region, and a bottom electrode. The bottom electrode is normally formed on a tungsten plug
7
that passes through an interregion dielectric
6
that can, for example, be made of silicon dioxide (SiO
2
) or silicon nitride (Si
3
N
4
). Typically, the top electrode is formed of two regions
1
and
2
that can be made of titanium aluminum nitride (TiAlN) and iridium (Ir), respectively. The bottom electrode is also typically formed of two regions
4
and
5
that can be made of Ir and TiAlN, respectively. The ferroelectric region
3
is disposed between the top and bottom electrodes in the capacitor stack. By way of example, the ferroelectric region
3
is composed of lead zirconate titanate (PZT).
FeRAM capacitor stacks are normally fabricated by individually growing each region of the stack, and then dry etching the stack to obtain a desired geometry. Often, the dry etching process used to fabricate FeRAM stacks forms chloride deposits
8
that surround the regions in the stack, and a damaged region
9
that is formed around the periphery of the ferroelectric region
3
as shown in FIG.
2
. Although chloride deposits are easily removed and therefore typically not a concern, the damaged region can adversely affect FeRAM performance in that this region can create a bridge between the top and bottom electrodes of the capacitor stack that causes capacitor leakage. Even where capacitor leakage is not a problem, the damaged region can interfere with proper FeRAM performance because the region does not possess the desired ferroelectric properties. This phenomenon is particularly problematic where the capacitor stack is extremely small in that the smaller the cross-sectional area of each region, the larger the percentage of this area that the damaged region occupies.
Previously, damaged regions of PZT thin films were removed by combining wet cleaning and high temperature annealing. The post-etch anneal is a common practice in ferroelectrics that normally ensures good contact formation and removal of any hydroxides on the films. However, the effectiveness of the post-etch wet clean depends upon the specific PZT deposition and etch processes used. For example, PZT regions formed with sol-gel techniques are typically lead (Pb) rich. This indicates that a large fraction of the damaged region residue may be lead chloride (PbCl
2
). Solutions comprising acetic acid, hydrofluoric acid, and ethanol in a volumetric ratio of 10:5:85 have been successfully used in etching such materials. However, metalorganic chemical vapor deposition (MOCVD) grown PZT tends to have a different composition in the as-grown state when compared to sol-gel films. Although highly acidic agents exist that can effectively remove the damaged regions of MOCVD PZT, such agents also tend to remove or damage the other components of the FeRAM stack. This can potentially degrade the operation of the FeRAM. Accordingly, it is desirable to have a post-etch cleaning treatment that is highly effective in removing damaged MOCVD PZT regions and that is highly selective such that the treatment will not harm the other components of the FeRAM stack.
SUMMARY OF THE INVENTION
The present disclosure relates to a post-etch cleaning treatment for a semiconductor device such as a FeRAM. The treatment comprises providing an etchant comprising both a fluorine compound and a chlorine compound, and applying the etchant to the semiconductor device in a wet cleaning process. Although other fluorine compounds can be used, the fluorine compound can comprise NH
4
F or HF. Although other chlorine compounds can be used, the chlorine compound can comprise HCl. Typically, the etchant is water-based. In one preferred embodiment, the etchant has a fluorine compound:chlorine compound:water composition ranging from approximately 1:1.6:5000 to 1:1.6:1000.


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Ghandhi, S., VLSI Fabrication Principles, John Wiley and Sons, pp. 517-519, 1983.

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