Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

Reexamination Certificate

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Details

C257S666000, C257S307000

Reexamination Certificate

active

06828662

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a packaged semiconductor device, and more particularly to a semiconductor device that realizes downsizing and low cost even though it has a capacitance therein.
2. Description of the Related Art
FIG. 9
is a schematic sectional view explaining the structure of the conventional semiconductor device.
Referring to
FIG. 9
, reference numeral
51
denotes a semiconductor device,
52
denotes an IC chip (semiconductor element),
53
denotes a frame on which the IC chip
52
is mounted.
Reference numerals
54
a
and
54
b
denote pad-shaped electrodes (hereinafter referred to as pads) provided on the IC chip
52
,
55
a
and
55
b
denote bonding wires (hereinafter referred to as wires), and
56
a
and
56
b
denote a first external terminal and a second external terminal. The wire
55
a
connects the pad
54
a
and the first external terminal
56
a
, and the wire
55
b
connects the pad
54
b
and the second external terminal
56
b.
Reference numeral
57
denotes a protection film provided such that the film covers over the IC chip
52
except the top surfaces of the pad
54
a
and the pad
54
b
,
58
denotes a molding compound covering the above-mentioned portions except a part of the first external terminal
56
a
and the second external terminal
56
b.
The conventional semiconductor device
51
thus arranged has the following problems.
Because the structure of the semiconductor device
51
is devoid of a capacitance, a capacitance is usually formed within the IC chip
52
or externally added to the semiconductor device
51
when a capacitance is used as a bypass capacitor between the power supply and the ground, or when a capacitance is needed for improving or adjusting properties of the semiconductor device when using the device as an analog element.
The method has been known in which a capacitance is formed within the IC chip
52
using the diffused layer of silicon or gate oxide film as a dielectric in the manufacturing process of the IC chip
52
, for instance. Furthermore, the method has been known, to externally add a capacitor to the semiconductor device
51
, which includes the capacitor and the semiconductor device
51
on the system substrate, for instance.
However, in the case where the capacitance is formed within the IC chip
52
, the cost thereof increases because of the increased area of the IC chip
52
. In the case where the capacitor is externally added to the semiconductor device, the method has its limits in the miniaturization and cost reduction of the electronic equipment on account of the need for a capacitive component, such as the above-mentioned capacitor.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above-mentioned problems. An object of the present invention is to provide a semiconductor device which is capable of alleviating an influence upon the IC exerted by the noises and improving performances of analog elements or the like mounted within the IC, by providing a capacitance within the package.
Another object of the present invention is to provide a semiconductor device which realizes downsizing and low cost of the IC chip and the electronic device.
A semiconductor device according to the present invention, includes a semiconductor element; a frame on which the semiconductor element is mounted; a conductive plate disposed under the frame at given intervals from the frame; and a molding compound for covering and encapsulating the semiconductor element, the frame, and the conductive plate.
Therefore, according to the present invention, a capacitance is formed beneath the semiconductor element within the semiconductor device. As a result, a semiconductor device is provided which alleviates the adverse effect upon the semiconductor element exerted by the noises of the power supply without increasing the size of the conventional semiconductor device.


REFERENCES:
patent: 4714952 (1987-12-01), Takekawa et al.
patent: 5559306 (1996-09-01), Mahulikar
patent: 6310388 (2001-10-01), Bissey
patent: 06-077395 (1994-03-01), None

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