Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-04-30
2004-06-08
Vinh, Lan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S712000, C438S720000, C438S745000, C216S067000, C134S001100
Reexamination Certificate
active
06746963
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for processing a silica group coating film having a low dielectric constant, and more specifically to a method for processing a silica group coating film having a dielectric constant equal to or less than 2.7 in the formation of a multi-layer wiring structure using a copper damascene method.
2. Description of Prior Art
The need for high integration of semiconductor devices is increasingly rising, and now we are entering into a generation of 0.13 &mgr;m gate lengths. It is already recognized that, by using Cu as a wiring material in such instances in place of the conventional Al, the characteristics of manufactured semiconductor elements can be improved in the following is aspects.
Cu is superior to Al in tolerance for EM (i.e., electromigration). Also, Cu has low resistance, and thereby it is possible to reduce signal delay due to wiring resistance. The use under high current density can be achieved, that is, an allowable current density can be improved by three (3) times or more by the use of Cu as described herein, and thereby the width of wiring used can be fine.
However, since it is difficult to control the etching rate of Cu compared to Al, a copper damascene method attracts attention as a method for realizing multi-layer wiring of Cu without any etching process. Proposals have been made (for example, Japanese unexamined patent application publication No. 2000-174023 and Japanese unexamined patent application publication No. 2000-174121).
Explanation of the copper damascene method will be given with reference to FIG.
7
.
First, as shown in FIG.
7
(
a
), an intermediate insulating film, being comprised of SiO
2
deposited through a CVD method or of SOG and having a low dielectric constant, is formed on a substrate, and a resist mask having a pattern is provided thereon. By etching, as shown in FIG.
7
(
b
), trench pattern is formed. Next, as shown in FIG.
7
(
c
), the trench pattern is lined with barrier metal, and as shown in FIG.
7
(
d
), Cu is embedded into the trench by means of electrolysis plating so as to form a lower layer wiring. After polishing the barrier metal and Cu by chemical polishing, another intermediate insulating film is formed thereon as shown in FIG.
7
(
e
). In the same manner, by selectively etching the intermediate insulating film through a resist mask having a pattern, as shown in FIG.
7
(
f
), via-holes (or contact holes) and trench holes (i.e., gutters for an upper layer wiring) are formed (dual damascene). As shown in FIG.
7
(
g
), the via-holes and the trench-holes for an upper layer wiring are lined with barrier metal and, as shown in FIG.
7
(
h
), Cu is embedded into the via-holes and the trench-holes for an upper layer wiring by means of electrolysis plating or the like, and thereby an upper layer wiring is formed.
In the above-mentioned explanation, copper is used for forming wiring in a damascene method. However, a damascene method forming can be conducted with aluminum. The present invention can be applied to a damascene method using various conductive metals as alternatives to copper.
When multi-layer wiring is formed by a damascene method, it is required that an aspect ratio (i.e., height/width) of via-holes should be increased for fine wiring. However, if SiO
2
formed through a CVD method is used for an intermediate insulating film, the aspect ratio will be at most 2. Also, the dielectric constant of SiO
2
is relatively high (&egr;=4.1), which is not satisfactory.
The use of organic or inorganic SOG having a lower dielectric constant has been examined as a means of overcoming this drawback. Further, it is desired to make organic or inorganic SOG having a lower dielectric constant.
It is recognized that the dielectric constant of an intermediate insulating film can be decreased by making the intermediate insulating film porous. However, the lower dielectric constant of such an intermediate insulating film corresponds to a decrease in the density of the film. As a result, alteration or corrosion occurs in the surface of the intermediate insulating film when wet stripping of a resist film is conducted as a subsequent process, and thus it is difficult to obtain a reliable semiconductor element thereby.
It is supposed that the reason for alteration in the surface of the intermediate insulating film in this case is that Si—R group (R refers to lower alkyl group or hydrogen atom) is decomposed (R group is separated) by the wet stripping process and a Si—OH bond is produced.
For example, in the case of organic SOG, a Si—CH
3
bond (CH
3
is an example) is broken to be Si—OH. In the case of inorganic SOG, a Si—H bond is broken to be Si—OH.
As a treatment applied to such an intermediate insulating film, prior arts have been known which are disclosed in Japanese Patent Application Publication Hei 11-162969, Japanese Patent Application Publication Hei 11-40813 and Japanese Patent Application Publication 2000-352827.
Japanese Patent Application Publication Hei 11-162969 discloses that a lower SOG layer is formed, plasma processing using inert gas such as Ar, Kr, Ne, N
2
, He or the like is conducted to the lower SOG layer, and thereby the adherence with respect to an upper SOG layer is increased. Japanese Patent Application Publication Hei 11-40813 discloses that plasma processing using low reactivity gas such as N
2
, Ar, He, O
2
or the like is conducted to the surface of a semiconductor element in which a contact region is formed by a dry etching process, residual etching gas or a reaction product is removed, and defect in the semiconductor element is reduced. Japanese Patent Application Publication 2000-352827 discloses that a silicon nitride film is formed on a substrate, an etching process is conducted to the silicon nitride film through a photoresist mask, plasma processing is conducted using hydrogen, ammonia, nitrogen, inert gas, or mixed gas thereof, and thereafter a cured surface layer of the photoresist mask is removed by a wet process.
However, in a case where a material having a dielectric constant equal to or less than 2.7 is used in the above-mentioned prior arts, there is a likelihood that alteration or corrosion is caused to the surface of the SOG at the time of a subsequent stripping process because the effect of controlling alteration of the Si—H bond in the surface of the SOG is not sufficient, and thereby the substrate finally obtained has a serious defect.
SUMMARY OF THE INVENTION
According to the present invention, to solve the problems as mentioned above, there is provided a method for processing a coating film comprising the steps of forming a silica group coating film having a dielectric constant equal to or less than 2.7 on a substrate, conducting an etching process to the silica group coating film through a photoresist pattern, processing the silica group coating film, to which an etching process has been conducted, with plasma induced from helium gas, and removing the photoresist pattern by a wet stripping process.
It is possible to prevent damage resulting from a wet stripping process by conducting a pre-treatment for a wet stripping process with plasma induced from helium gas. It is supposed that the reason for this preventive effect is that plasma induced from helium gas attacks the coating film having a Si—H group and the Si—H bond in the surface layer is changed into a Si—O—Si bond.
The dielectric constant equal to or less than 2.7 is preferable for an intermediate insulating film used in a damascene method. The silica group coating film is not limited to a particular one as long as it has such a dielectric constant. The silica group coating film having such a dielectric constant can be achieved by forming with coating liquid as follows:
The coating liquid can include a condensation product which is obtained through hydrolysis of trialkoxysilane within an organic solvent under an acid catalysis. In particular, it is preferable to obtain the coating liquid by dissolving trialkoxysilane having a concen
Fujii Yasushi
Iida Hiroyuki
Sato Isao
Wakiya Kazumasa
Yokoi Shigeru
Blackman William D.
Carrier Joseph P.
Carrier Blackman & Associates P.C.
Tokyo Ohka Kogyo Co. Ltd.
Vinh Lan
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