System and method for divisor threshold control in a...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C341S155000

Reexamination Certificate

active

06781534

ABSTRACT:

TECHNICAL FIELD
This invention relates to analog computation circuits and more particularly to systems and methods for a divisor threshold circuit for a modulation domain divider.
BACKGROUND
A limitation that any computational device has is that division by zero is undefined. In the specific case of a modulation domain divider, as discussed in above-identified U.S. patent application Ser. No. 10/328,304, operation is impaired not only for a divisor of zero, but also for a small divisor below the minimum design value for the divisor (referred to as the “divisor threshold”).
The modulation domain divider, as discussed above is directed to a system and method for performing analog division in the modulation domain and, as discussed, has an undefined output when the divisor is below the divisor threshold. In one embodiment, a sine wave carrier is amplitude modulated by one of the input signals and a cosine wave carrier is amplitude modulated by the other of the input signals. These amplitude modulated signals are added together in a modified Armstrong modulator configuration, with the result being an amplitude and phase modulated signal having a phase modulation index proportional to the ratio of the amplitudes of the first and the second input signals. After removing the amplitude modulation with a limiter, this signal is then phase demodulated. The resulting baseband signal is proportional to the ratio of the first to the second signals. In essence then the Armstrong modulator is modified to enable the divisor signal to maintain inverse proportional control of the modulation gain of the Armstrong phase modulator, by varying the carrier injection level.
DISCUSSION OF PRIOR ART CIRCUITS
A commonly used circuit and method to perform the division using logarithms is shown in FIG.
8
. This circuit is based on the mathematical property that the logarithm of a quotient is equal to the difference of the logarithms of the dividend and divisor.
As shown in
FIG. 8
, input signals n(t) and d(t) to circuit
80
are conditioned by passing each of them through logarithm function blocks
801
and
802
respectively. The logarithms of the input signals are subtracted by block
803
and the result is sent to antilogarithm (exponentiation) block
804
. The accuracy of nonlinear circuit
80
depends upon how accurately the logarithmic (
801
,
802
) and antilogarithmic (
804
) functions are realized. If the signals involved have wide dynamic range, then the transistors within the calculation blocks must operate over a wide range of currents. This increases the difficulty of achieving accurate nonlinear functions. Also, when the current is small, bandwidth tends to suffer. The design equations for this type of circuit are all highly temperature dependent, making drift a problem. It is also difficult to obtain a low noise floor using analog circuits as described.
Another commonly used circuit and method is to use a multiplier, such as multiplier
902
, in a feedback path of a servo loop, as shown in
FIG. 9
circuit
90
. This has the effect of using a multiplier to obtain division when its output is fed into subtractor
901
. Such a circuit is an inverse multiplier analog divider. Multiplier
902
is commonly constructed as a Gilbert multiplier. There are two main practical difficulties with this circuit. First the divider accuracy can be no better than the accuracy of the multiplier. Although a Gilbert multiplier is somewhat easier to build than the logarithmic circuits of
FIG. 9
, it still has problems with linearity, dynamic range, and noise. Second, the accuracy of the circuit is also affected by errors in the servo loop. Impairments in servo amplifier
903
can cause loop tracking errors, denoted &egr; in FIG.
9
. Also, the loop gain varies depending on the characteristics of the signals being divided. This makes loop design difficult and loop dynamics unpredictable.
FIG. 10
shows Armstrong phase modulator
1000
where sine wave carrier generator
1001
drives multiplier
1003
via amplifier
1005
(gain=−1) which is being used as a double side band suppressed carrier (DSB-SC) (balanced) modulator. A DSB-SC signal is the same as a conventional amplitude modulation signal, except that the carrier is suppressed. Modulation input port
1010
drives the other input of multiplier
1003
. The output of multiplier
1003
is a DSB-SC signal. The DSB-SC signal drives one input of adder
1004
. The other input to the adder is the carrier signal shifted 90° by shifter
1002
. Output
1011
of adder
1004
is a phase-modulated signal. The modulation index is proportional to the ratio of the amplitude of the DSB-SC signal to the injected carrier amplitude. Modulation index is defined as the peak phase deviation in radians.
For proper operation, the maximum modulation index must be within the “small angle approximation” regime, where phase modulation can be considered a linear process. This is also known as narrow band phase modulation (NBPM). In general, phase modulation (a member of the angle modulation family) is a non-linear process. The modulation index limit for NBPM is approximately 0.5, depending on the amount of modulation error that can be tolerated. For example, if the modulation index is limited to 0.45, then the harmonic distortion for tone modulation is less than 5%.
BRIEF SUMMARY
In accordance with the invention, a modulation domain divider is disclosed that causes the divider output to be attenuated when the divisor input falls below the divisor threshold. Attenuation is accomplished by implementing the divider in the modulation domain and substituting an unmodulated signal for the normal modulated signal when the divisor is below the threshold value. In systems when a long run of data occurs without data transitions it is desirable to essentially “mute” the phase output by reducing it to near zero.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized that such equivalent constructions do not depart from the invention as set forth in the appended claims. The novel features which are believed to be characteristic of the invention, both as to its organization and method of operation, together with further objects and advantages will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present invention.


REFERENCES:
patent: 3872477 (1975-03-01), King
patent: 4229715 (1980-10-01), Henry
patent: 4433312 (1984-02-01), Kahn
patent: 5862155 (1999-01-01), Lomp et al.
patent: 5995552 (1999-11-01), Moriyama
patent: 6057798 (2000-05-01), Burrier et al.
U.S. patent application Ser. No. 10/328,298, Karlquist, filed Dec. 23, 2002.
U.S. patent application Ser. No. 10/328,358, Karlquist, filed Dec. 23, 2002.
U.S. patent application Ser. No. 10/328,363, Karlquist, filed Dec. 23, 2002.
Armstrong, Edwin H, “A Method of Reducing Disturbances in Radio Signaling by a System of Frequency Modulation,” Proc. IRE, vol. 24, No. 5, ay 1936, p. 689ff.
Jaffe, D.L., “Armstrong's Frequency Modulator,” Proc. IRE, vol. 26, No. 4, Apr. 1938, p. 475ff.

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