Semiconductor memory module

Details Semiconductor memory module Semiconductor memory module

2003-01-07

2004-08-31

Martin, David (Department: 2841)

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

C365S053000, C257S048000

Reexamination Certificate

active

06785143

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory module having a plurality of semiconductor chips mounted on a module substrate
2. Description of the Background Art
A method of fabricating a conventional semiconductor chip formed by a bare chip singly coated with molding resin is now described. In the method of fabricating the conventional semiconductor chip, each of bare chips
101
formed as parts of a wafer
140
shown in
FIG. 5
is subjected to a probe test (wafer test (WT)) after completion of a wafer process. Among the plurality of bare chips
101
, a bit detected as defective as a result of the probe test is replaced with a normally functioning spare bit. Thus, each bare chip
101
is employed as a semiconductor chip normally functioning as a simple substance.
Then, the wafer
140
is diced (cut) along dicing lines
112
shown in
FIG. 5
, for separating the bare chips
101
from each other. A lead frame is die-bonded (fixed) to each bare chip
101
cut out from the diced wafer
140
. As shown in
FIG. 6
, thin metal bonding wires
105
connect bonding pads
106
of the bare chip
101
and the lead frame with each other. Thereafter the bare chip
101
and the lead frame are molded (sealed) with resin or ceramic.
After the aforementioned assembly step, a final test (FT) represented by an acceleration test or an electrical characteristic test is performed in order to check whether or not each bare chip
101
normally functions. Finally, a QAT (quality assurance test) is performed. Consequently, bare chips
101
having excellent quality are shipped as finished products.
As to the aforementioned semiconductor chip prepared by singly coating the bare chip
101
with molding resin, therefore, the final test can be performed when each semiconductor chip is coated with the molding resin. When a semiconductor memory module is fabricated by mounting a plurality of such semiconductor chips prepared by individually coating the bare chips
101
with molding resin on a module substrate, therefore, the semiconductor memory module can be repaired by replacing only a semiconductor chip detected as defective in the final test with another normally functioning semiconductor chip (The chip functions without any problem in usual use).
When another type of semiconductor memory module is fabricated by mounting the aforementioned plurality of bare chips
101
on a module substrate and integrally sealing the plurality of bare chips
101
with molding resin, for example, and at least a single defective bare chip
101
is detected in a system test performed after integrally sealing the plurality of bare chips
101
, however, it is difficult to replace the defective bare chip
101
with another normally functioning bare chip
101
, and hence the yield is reduced.
However, the semiconductor memory module fabricated by mounting the plurality of bare chips
101
on the module substrate and integrally sealing the plurality of bare chips
101
is superior to the semiconductor memory module fabricated by mounting the plurality of semiconductor chips prepared by individually coating the bare chips
101
with the molding resin on the module substrate in a point that the mounting area for the bare chips
101
can be reduced.
Therefore, a semiconductor memory module fabricated by mounting a plurality of bare chips
101
on a module substrate and integrally sealing the plurality of bare chips
101
as shown in
FIG. 7
desirably includes a spare bare chip with a function of replacing a bare chip
101
detected as defective with the spare bare chip.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor memory module, fabricated by integrally sealing a plurality of bare chips, having a function of replacing a bare chip detected as defective with a spare bare chip.
The semiconductor memory module according to the present invention has a plurality of semiconductor chip assemblies, each including a single plate semiconductor material formed by combining a plurality of semiconductor chips with each other, mounted on a module substrate. Each semiconductor chip assembly includes a plurality of semiconductor storage parts provided on the semiconductor material for individually functioning as the said plurality of semiconductor chips and a semiconductor storage part employment
onemployment selection circuit setting each of the plurality of semiconductor storage parts in either a mode capable of inputting/outputting data or a mode incapable of inputting/outputting the data.
According to the aforementioned structure, a spare semiconductor chip is provided among the plurality of semiconductor chips, so that the semiconductor memory module can exhibit a prescribed function whether or not the plurality of semiconductor chips mounted on the module substrate include a defective semiconductor chip. Therefore, the yield of the semiconductor memory module is improved.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 5491360 (1996-02-01), Lin
patent: 5508565 (1996-04-01), Hatakeyama et al.
patent: 5982043 (1999-11-01), Iwata
patent: 6208546 (2001-03-01), Ikeda
patent: 6429528 (2002-08-01), King et al.
patent: 6531339 (2003-03-01), King et al.
patent: 01-235264 (1989-09-01), None

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