Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2003-04-08
2004-11-30
Chowdhury, Tarifur R. (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S042000, C349S138000, C257S059000, C257S072000
Reexamination Certificate
active
06825893
ABSTRACT:
The present invention claims the benefit of Korean Patent Application No. 2002-18961, filed in Korea on Apr. 8, 2002, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to an array substrate for a liquid crystal display device and a manufacturing method thereof.
2. Discussion of the Related Art
In general, a liquid crystal display (LCD) device includes two substrates that are spaced apart and face each other, and a liquid crystal material layer interposed between the two substrates. Each of the substrates includes electrodes that face each other, wherein a voltage applied to each electrode induces an electric field between the electrodes. An alignment of liquid crystal molecules of the liquid crystal material layer is changed by varying an intensity or direction of the applied electric field. Accordingly, the LCD device displays an image by varying light transmissivity through the liquid crystal material layer in accordance with the arrangement of the liquid crystal molecules.
FIG. 1
is an exploded perspective view of a liquid crystal display (LCD) device according to the related art. In
FIG. 1
, an LCD device
11
has upper and lower substrates
5
and
22
, which are spaced apart from and facing each other, and a liquid crystal material layer
15
interposed between the upper and lower substrates
5
and
22
.
The upper substrate
5
includes a black matrix
6
, a color filter layer
7
, and a transparent common electrode
9
subsequently disposed on an interior surface thereof. The black matrix
6
has an opening such that the color filter layer
7
corresponds to the opening of the black matrix
6
and includes three sub-color filters of red (R), green (G), and blue (B).
A gate line
12
and a data line
38
are formed on an interior surface of the lower substrate
22
, whereby the gate line
12
and the date line
38
cross each other to define a pixel area P, and a thin film transistor T is formed at the crossing of the gate line
12
and the data line
38
. The thin film transistor T is composed of a gate electrode, a source electrode, and a drain electrode. A pixel electrode
52
, which is connected to the thin film transistor T, is formed within the pixel area P and corresponds to the sub-color filters. In addition, the pixel electrode
52
is made of a light transparent conductive material, such as indium-tin-oxide (ITO). The lower substrate
22
may be commonly referred to as an array substrate.
A scanning pulse is supplied to the gate electrode of the thin film transistor T through the gate line
12
, and a data signal is supplied to the source electrode of the thin film transistor T. The LCD device is driven due to electrical and optical effects of the liquid crystal material layer
15
. The liquid crystal material layer
15
includes a dielectric anisotropic material having spontaneous polarization properties. Accordingly, when an electric field is induced to the liquid crystal material layer
15
, the liquid crystal molecules form a dipole due to the spontaneous polarization. Thus, the liquid crystal molecules of the liquid crystal material layer
15
are arranged by the applies electric field. Optical modulation of the liquid crystal material layer
15
occurs according to the arrangement of the liquid crystal molecules. Therefore, images of the LCD device are produced by controlling light transmittance of the liquid crystal material layer
15
due to optical modulation.
FIG. 2
is a plan view of an array substrate for a LCD device according to the related art. In
FIG. 2
, a gate line
12
and a data line
38
cross each other to define a pixel area P, and a thin film transistor T is formed at the crossing of the gate and data lines
12
and
38
to function as a switching element. The thin film transistor T is composed of a gate electrode
14
that is connected to the gate line
12
and receives scanning signals, a source electrode
40
that is connected to the data line
38
and receives data signals, and a drain electrode
42
that is spaced apart from the source electrode
40
. The thin film transistor T further includes an active layer
32
between the gate electrode
14
and the source and drain electrodes
40
and
42
.
A storage capacitor electrode
28
overlaps the gate line
12
. A pixel electrode
52
is formed in the pixel area P and is connected to the drain electrode
42
through a drain contact hole
48
and to the storage capacitor electrode
28
. The gate line
12
and the storage capacitor electrode
28
function as first and second storage capacitor electrodes, respectively, and form a storage capacitor Cst.
Although not shown in
FIG. 2
, an ohmic contact layer is formed between the active layer
32
and the source and drain electrodes
40
and
42
. The active layer
32
is made of amorphous silicon and the ohmic contact layer is formed of a doped amorphous silicon. A first pattern
35
and a second pattern
29
, which include the amorphous silicon and the doped amorphous silicon, are formed under the data line
38
and the storage capacitor electrode
28
, respectively. The array substrate of
FIG. 2
is fabricated using four masks, and in the array substrate, the pixel electrode may be disconnected in a region contacting the drain electrode. Thus, poor images may be displayed.
FIGS. 3A
to
3
C,
4
A to
4
C,
5
A and
5
B, and
6
A and
6
B show a manufacturing method of an array substrate using four masks according to the related art, and correspond to a region D of FIG.
2
.
FIGS. 3A
,
4
A,
5
A, and
6
A are plan views showing the manufacturing method of the array substrate according to the related art, and
FIGS. 3B and 3C
are cross sectional views along III—III of
FIG. 3A
,
FIGS. 4B and 4C
are cross sectional views along IV—IV of
FIG. 4A
, and
FIG. 5B
is a cross sectional view along V—V of
FIG. 5A
, and
FIG. 6B
is a cross-sectional view along VI—VI of FIG.
6
A.
In
FIGS. 3A and 3B
, a gate line
12
and a gate electrode
14
are formed on a transparent insulating substrate
22
by depositing a first metal layer and patterning the first metal layer through a first mask process. The gate line
12
and the gate electrode
14
are made of a metal material, such as aluminum (Al), an aluminum alloy, molybdenum (Mo), tungsten (W), and chromium (Cr). The gate line
12
and the gate electrode
14
may be formed of a double layer using aluminum or an aluminum alloy and molybdenum or chromium.
Next, a gate insulating layer
16
, an amorphous silicon layer
18
, a doped amorphous silicon layer
20
, and a second metal layer
24
are subsequently deposited on the substrate
22
, the gate line
12
, and the gate electrode
14
. The gate insulating layer
16
is made of an inorganic insulating material, such as silicon nitride (SiNx) and silicon oxide (SiO
2
), and the second metal material
24
is formed of one of chromium, molybdenum, tungsten, and tantalum (Ta).
In
FIG. 3C
, a photoresist layer
26
is formed on the second metal layer
24
by coating a photoresist material. A mask
50
includes a transmitting portion A, a blocking portion B, and a half transmitting portion C that are disposed over the photoresist layer
26
, wherein the half transmitting portion C corresponds to the gate electrode
14
. The photoresist layer
26
may be a positive type, wherein a portion exposed to light is developed and removed. Subsequently, the photoresist layer
26
is exposed to light such that the portion of the photoresist layer
26
corresponding to the half transmitting portion C is exposed to the light in an amount less than the photoresist layer
26
corresponding to the transmitting portion A.
In
FIGS. 4A and 4B
, the exposed photoresist layer
26
(in
FIG. 3C
) is developed, whereby a photoresist pattern
26
a
having different thicknesses is formed. A first thickness of the photoresist pattern
26
a
corresponds to the blocking portion B (in
FIG. 3C
) and a second thickness of the photores
Chowdhury Tarifur R.
LG. Philips LCD Co. Ltd.
LandOfFree
Array substrate for liquid crystal display device having a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Array substrate for liquid crystal display device having a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Array substrate for liquid crystal display device having a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3305186