Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2001-10-22
2004-08-10
Booth, Richard A. (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S754000, C257S774000, C438S629000
Reexamination Certificate
active
06774488
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The invention relates to low leakage and low resistance plugs, specifically low leakage and low resistance plugs for a memory device and the manufacturing method for the plugs. In particular, a doped polysilicon layer is first deposited at contact nodes and bit-line contacts inside memory to form a low leakage interface, followed by depositing a low contact resistance imbedded tungsten plug in the polysilicon layer to form a low contact resistance imbedded tungsten plug.
2. Related Art
Embedded DRAM is one example of a product that integrates the memory circuit and the logic circuit in one manufacturing process. However, when integrating two circuits with different functions in a single manufacturing process, the following problem arises. For the memory circuit, the memory cell and the linking current of the capacitor have to be limited to their minima so that the memory will have a longer retention time. The memory circuit uses a doped polysilicon plug as the conducting loop for the cell contact and bit-line contact. Although the doped polysilicon plug provides low leakage interface, it has a high contact resistance Rc. On the other hand, the logic circuit of the embedded DRAM has to have a higher driving current to have a faster reaction speed. Therefore, the internal conducting loop is formed using tungsten plugs to satisfy the low contact resistance and high speed characteristics. Nevertheless, the linking current becomes serious.
For the foregoing reasons, a polysilicon plug and tungsten plug are usually formed individually in memory circuit and logic circuit areas with separate procedures during the manufacturing process of the memory to satisfy the properties of the memory circuit and logic circuit. Using this method can result in low leakage and low contact resistance and temporarily solve the problem of integrating them in the same manufacturing process. Thus, the experts in the field are pursuing how to effectively utilize the above polysilicon plug and tungsten plug procedures.
SUMMARY OF THE INVENTION
An objective of the invention is to provide low leakage and low resistance plugs for a memory device and the method for manufacturing the plugs. According to the invention, a low leakage imbedded polysilicon layer is formed on a memory cell inside the memory. Then low contact resistance tungsten contact plugs are deposited in the imbedded polysilicon layer. Using the double layer plug structure, the conducting loop of the memory cell not only has low leakage but also achieves unprecedented low contact resistance over conventional manufacturing processes, thus increasing the speed of the memory device.
Another objective of the invention is to provide low leakage and low resistance plugs for a memory device and the manufacturing method of the plugs, wherein the polysilicon and tungsten inside the memory cell form double layer plugs by deposition and stacking without performing such steps as forming photo resist, mask development, removing photo resist, etc. Thus, the invention can simplify manufacturing memory.
To achieve the foregoing objectives, the method in accordance with the present invention includes the steps of forming a polysilicon layer, forming imbedded tungsten plugs and chemical machine polishing (CMP).
In the forming a polysilicon layer step, a polysilicon layer is deposited on a silicon substrate with multiple transistors formed on the substrate, so that the contact nodes and the bit-line contacts are covered by the polysilicon layer.
In the forming imbedded tungsten plugs step, the imbedded tungsten plugs are formed at the contact nodes (CNs) and bit-line contacts (CBs) above the polysilicon layer by depositing.
In the chemical machine polishing step, the height of the imbedded tungsten plugs are polished to the top of each contact node and bit-line contact.
Through the foregoing steps, a double layer material with a low leakage polysilicon layer and low contact resistance tungsten plugs form the contact nodes and bit-line contacts inside the memory.
REFERENCES:
patent: 4801559 (1989-01-01), Imaoka
patent: 5670425 (1997-09-01), Schinella et al.
patent: 6028000 (2000-02-01), Cho
patent: 6294422 (2001-09-01), Sunouchi et al.
patent: 6444520 (2002-09-01), Dennison et al.
Chen Hsi-Chuan
Huang Wen-Kuei
Booth Richard A.
Jackson & Walker, LLP
Winbond Electronics Corp.
LandOfFree
Low leakage and low resistance for memory and the... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Low leakage and low resistance for memory and the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low leakage and low resistance for memory and the... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3301862