Television – Camera – system and detail – Combined image signal generator and general image signal...
Reexamination Certificate
2000-03-24
2004-06-15
Ho, Tuan (Department: 2612)
Television
Camera, system and detail
Combined image signal generator and general image signal...
C348S231300
Reexamination Certificate
active
06750909
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to image processing, and more particularly to a method and system for allowing a data processor to efficiently access image data from a memory in multiple formats.
BACKGROUND OF THE INVENTION
In a conventional image processing system such as a digital still camera, an image sensor within an image gathering device, such as a charge-coupled device (CCD) or a CMOS sensor, converts a picture frame of image light information to electronic analog signals. The resultant analog image signals are converted by an analog-to-digital converter (ADC) to digital image data. The digital image data is then transferred to a memory storage device. Burst access memories such as synchronous dynamic random access memory (SDRAM) or conventional burst DRAMs are popular in camera designs for their ability to output large amounts of data quickly.
A data processor, such as a digital signal processor (DSP), typically accesses data a word at a time by referring to a specific word address in the DRAM. In contrast, a burst access memory is designed to output multiple pieces of data based on a single address reference. Therefore, in conventional imaging systems that use a DSP and a burst access memory, the data burst is not fully used. In addition, as many as three clocks cycles of latency time can be consumed as the digital signal processor addresses the SDRAM memory for each word of data it requires. In image processing, it is particularly advantageous to access stored data block by block, which a burst access memory is well suited for, rather than line by line or bit by bit. Digital signal processors are not particularly suited for retrieving block data from memory, however. For example, in performing a seven-tap filtering function, the processor will request seven bursts of data from the memory and the read/write overhead will be 21 clock cycles, assuming once again that three clock cycles of latency are necessary for each burst.
Another problem with conventional image processing solutions is that sampling of discontinuous pieces of data within a memory also requires excessive data processor overhead since the processor must locate and address data that may be spread throughout the image.
Finally, in prior art digital still cameras, the brightness of the photographed image is controlled by means of a diaphragm mechanism by driving the lens control device in accordance with brightness data of the photographed object detected by an auto exposure sensor and an auto-exposure calculating device. Furthermore, prior art cameras typically include a special sensor designed to detect the distance to the subject to allow for automatically focusing the lens. Consequently, in the conventional digital still camera, the manufacturing costs and size of the camera increase with the addition of auto exposure and auto focus functionality. There is a need for an image processing system that can reduce processor overhead, allow determination of photographic parameters like white balance and brightness, and provide auto focus functionality with reduced manufacturing costs and system size.
SUMMARY OF THE INVENTION
In embodiments disclosed herein the present invention provides an image buffer which can execute auto exposure and white balance by sub-sampling (down-sampling) the photographed image data stored in the memory and then transferring the sampled image data to the processor for exposure calculation and white balance calculation when the photographed image data are retrieved either in line access mode or in block access mode in response to a request from the processor. The sampling rate can be controlled by the processor in a programmable manner and the auto exposure and auto white balance of the photographed image data can be executed efficiently while still providing satisfactory results.
In one embodiment of the invention, an image processing system is disclosed. The system comprises a memory capable of storing a picture frame of image data and outputting the data in a format comprising one or more bursts of data; a data processor capable of processing at a given time an amount of data less than the one or more bursts of data; and a data buffer coupled between the memory and the data processor. The data buffer has a size sufficient to store the one or more bursts of data and capable of outputting an amount of data within the processing capability of the data processor. The format can comprise a block of data, a line of data, or data sampled from spatially diverse locations within the picture frame of data.
In another embodiment of the invention, an image processing system is disclosed. The system comprises a burst memory; a data processor; and a data buffer coupled between the burst memory and the data processor. The data buffer comprises a block memory coupled to the burst memory and to the data processor; and an access controller coupled to the block memory, to the data processor and to the burst memory. The access controller transfers data from the burst memory to the block memory in a format specified to the access controller by the data processor. The access controller also transfers the formatted data from the block memory to the data processor. The format can comprise a block of data, a line of data, or data sampled from spatially diverse locations within the picture frame of data.
In yet another embodiment of the invention, a method of processing image data in a camera is disclosed. The method comprises the steps of storing the image data in a memory; selecting a portion of the image data in a format determined by a data processor coupled to the memory; storing the formatted data in a second memory; and transferring the formatted data to the data processor.
One advantage of the invention is that it provides an efficient interface between a processor and a memory like a burst access DRAM by, for example, increasing the processing bandwidth of the processor by reducing the overhead for data access. Another advantage of the invention is that it allows for sampling of data within an image that can be used in image enhancement calculations performed by the data processor.
REFERENCES:
patent: 5164831 (1992-11-01), Kuchta et al.
patent: 5239387 (1993-08-01), Stein et al.
patent: 5673422 (1997-09-01), Kawai et al.
patent: 6111604 (2000-08-01), Hashimoto et al.
patent: 6374033 (2002-04-01), Hoshi
patent: 6515703 (2003-02-01), Suzuki et al.
patent: 2001/0017657 (2001-08-01), Kowno et al.
patent: 2003/0058355 (2003-03-01), Wong et al.
patent: 0 393 509 (1990-10-01), None
patent: 0 576 226 (1993-12-01), None
patent: 0 605 185 (1994-07-01), None
Brady III W. James
Ho Tuan
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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