Amplifiers – Combined with automatic amplifier disabling switch means
Reexamination Certificate
2002-02-25
2004-03-30
Mottola, Steven J. (Department: 2817)
Amplifiers
Combined with automatic amplifier disabling switch means
C330S069000, C330S301000
Reexamination Certificate
active
06714069
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the field of tuners. The invention also relates to devices wherein such tuners are implemented, such as television receivers, video recorders or decoder boxes. The invention more particularly relates to an amplifier circuit comprising:
a pre-amplifying stage,
an amplifying stage, and
identification means for identifying the configuration of the amplifying stage.
PRIOR ART
Such an amplifier circuit is known from the PCT patent application published under publication no. WO 00/21193.
According to this patent application, when an amplifying stage
511
is configured so as to be in the asymmetrical mode, i.e. when different outputs of this amplifying stage are connected together, a commutator Sw controlled by control means
53
connects one of the outputs O
2
of the amplifying stage
511
to ground. A configuration in an asymmetrical mode of an amplifying stage optimized for operation in the symmetrical mode causes a deterioration of the amplification characteristics. The magnitude of this deterioration can be limited to some extent by connecting one of the outputs of the amplifying stage to ground. In an improved variant, as shown in
FIG. 2
of said patent application, commutation means
2513
comprise two commutators. When the amplifying stage
2511
is configured so as to be in the symmetrical mode, a first commutator: SW
22
is open so that the gain of the amplifier circuit is determined by a first set of resistors R
1
, R
2
and R
4
. When the amplifying stage
2511
is configured so as to be in the asymmetrical mode, a single output branch of the amplifying stage is used, and it is suitable to increase the gain of said branch. For this purpose, the commutator SW
22
is in the closed state and a resistor R
3
is introduced into the circuit, thereby increasing the gain of the branch that is still being used.
Said patent application does not indicate how the controller
53
is controlled so as to either activate or not activate the commutation means SW, SW
21
, SW
22
. Persons skilled in the art are also well aware of the fact that the modification of the amplifier circuit intended to limit the deterioration of the amplification characteristics only palliates this deterioration, and that the correction is not the optimum that can be achieved in the asymmetrical mode.
BRIEF DESCRIPTION OF THE INVENTION
It is an object of the invention to overcome the drawbacks described hereinabove by providing an amplifier circuit which can suitably be configured, in a flexible manner, so as to be in the symmetrical or asymmetrical mode, the performance of the circuit being automatically optimized irrespective of the mode of operation of the circuit resulting from its configuration.
Thus, in accordance with the invention, an amplifier circuit in accordance with the opening paragraph is characterized in that it additionally comprises adaptation means to configure the pre-amplifying stage in such a manner that it supplies the amplifying stage with:
either two signals which are in phase opposition if the amplifying stage is configured so as to be in the symmetrical mode,
or two signals which are in phase if the amplifying stage is configured so as to be in the asymmetrical mode.
By virtue of the invention, in either mode of operation, i.e. the symmetrical or asymmetrical mode, the performance of the amplifier circuit as regards gain, linearity and output impedance meets the expectations of a circuit optimized for operation in said mode. Thus, unlike the prior art, it is not merely a limitation of the degradation in performance resulting from a configuration other than the configuration for which the amplifier circuit has been designed, but instead an optimization of each one of the configurations.
In the amplifier circuit in accordance with the prior art, a part of the amplifying stage is deactivated during operation in the asymmetrical mode, the gain of the other part being then increased. In accordance with the invention, the whole amplifying stage is used to full advantage to generate the output signal of the amplifier circuit, irrespective of the configuration chosen.
Thus, in its most general mode, the invention relates to a method of optimizing the operation of an amplifier circuit, comprising:
a pre-amplifying stage, and
an amplifying stage,
which method includes an identification step for identifying the configuration of the amplifying stage, characterized in that the method additionally comprises a configuration step for configuring the pre-amplifying stage, as a result of which the amplifying stage is supplied with:
either two signals which are in phase opposition if the amplifying stage is configured so as to be in the symmetrical mode,
or two signals which are in phase if the amplifying stage is configured so as to be in the asymmetrical mode.
In accordance with an embodiment of the invention, the pre-amplifying stage may comprise two pre-amplifiers, which are both arranged between two inputs of the amplifier circuit and two inputs of the amplifying stage, the adaptation means alternately activating one of the two pre-amplifiers and deactivating the other.
The first pre-amplifier amplifies the input signal in such a way that the signals present at each one of the outputs are in phase opposition with respect to one another. The second pre-amplifier amplifies the input signal in such a way that the signals present at each one of the outputs of the pre-amplifying stage are in phase.
REFERENCES:
patent: 3757241 (1973-09-01), Kime et al.
patent: 5648742 (1997-07-01), Ghaffaripour et al.
patent: WO0201712 (2001-06-01), None
Mottola Steven J.
Waxler Aaron
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