Memory array architecture for flash memory

Details Memory array architecture for flash memory Memory array architecture for flash memory

1991-02-19

1993-02-09

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

36518901, 365218, 36523001, G11C 1300

Patent

active

051857189

ABSTRACT:
Disclosed is a EEPROM flash memory array utilizing single transistor cells to provide read/write nonvolatile storage. The array includes a plurality of sectors, each oriented along the word line direction, and the sectors may include one or more word lines. An erase select transistor is provided for each sector and each word line includes a pass gate transistor which assists in both the programming and the erase operations.

REFERENCES:
patent: 5101379 (1992-03-01), Lin et al.

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