Voltage controlled oscillation circuit having easily...

Oscillators – Ring oscillators

Reexamination Certificate

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C331S17700V, C331S034000

Reexamination Certificate

active

06714087

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a configuration of a voltage controlled oscillation circuit capable of variably controlling an oscillation frequency in accordance with a level of an externally applied voltage.
2. Description of the Background Art
In a large scale integrated circuit (referred to as “LSI” hereinafter), a clock generation circuit or the like which generates an internal clock signal synchronous with an external clock signal inside the LSI is often mounted so as to operate the internal circuit of the LSI synchronously with a clock applied from a system.
For such a clock generation circuit, a configuration in which an oscillation frequency of a self-excited oscillation type ring oscillator circuit is controlled so as to synchronize a phase of the oscillation output of this ring oscillator circuit with a phase of the external clock signal is sometimes employed. In order to allow the ring oscillator circuit to perform an oscillation operation while controlling the oscillation frequency of the ring oscillator circuit so as to synchronize the phase of the oscillation output of this ring oscillator circuit with the phase of the external clock signal, a so-called voltage controlled oscillation circuit (referred to as “VCO circuit” hereinafter) is employed.
FIG. 20
is a circuit diagram for describing a configuration of a conventional VCO circuit
8000
.
VCO circuit
8000
is provided with an operating current control section
8100
which controls an operating current value in accordance with an external control voltage VIN, and a ring oscillator circuit
8200
which performs a self-excited oscillation operation with an operation current controlled by operation current control section
8100
.
Operating current control section
8100
is provided with a P-channel MOS transistor TP
01
, an N-channel MOS transistor TN
01
and a resistor R
1
which are connected in series between a power supply potential Vcc and a ground potential GND, and a P-channel MOS transistor TP
02
and an N-channel MOS transistor TN
02
which are connected in series between power supply potential Vcc and ground potential GND.
A gate of transistor TP
01
is connected to a gate of transistor TP
02
, and the gate of transistor TP
01
is coupled to a drain of transistor TP
01
. Therefore, transistors TP
01
and TP
02
operate as a current mirror circuit. In addition, transistor TN
01
receives control voltage VIN.
Operating current control section
8100
is further provided with a resistor R
0
which is provided between the gate of transistor TP
01
and ground potential GND.
On the other hand, ring oscillator circuit
8200
includes odd stages of inverters, e.g., three stages of inverters INV
1
to INV
3
.
An output of inverter INV
3
is applied to an input of inverter INV
1
and cascaded inverters INV
1
to INV
3
perform self-excited oscillation operation.
Inverter INV
1
is provided with a P-channel MOS transistor TP
11
, a P-channel MOS transistor TP
12
, an N-channel MOS transistor TN
12
and an N-channel MOS transistor TNN
11
which are connected in series between power supply potential Vcc and ground potential GND. A gate of transistor TP
11
is coupled to a wiring LPV which is coupled to the gate of transistor TP
01
(and the gate of transistor TP
02
). On the other hand, a gate of transistor TN
11
is coupled to a wiring LNV which is coupled to the gate of transistor TN
02
. A gate of transistor TP
12
is coupled to a gate of transistor TN
12
and the output of inverter INV
3
is applied to a coupling node thereof.
Inverter INV
2
is provided with a P-channel MOS transistor TP
21
, a P-channel MOS transistor TP
22
, an N-channel MOS transistor TN
22
and an N-channel MOS transistor TN
21
which are connected in series between power supply potential Vcc and ground potential GND. A gate of transistor TP
21
is coupled to wiring LPV. A gate of transistor TP
22
and a gate of transistor TN
22
are coupled to each other and receive a potential of an output node of inverter INV
1
. A gate of transistor TN
21
is coupled to wiring LNV.
Inverter INV
3
is provided with a P-channel MOS transistor TP
31
, a P-channel MOS transistor TP
32
, an N-channel MOS transistor TN
32
and an N-channel MOS transistor TN
31
which are connected in series between power supply potential Vcc and ground potential GND. A gate of transistor TP
31
is coupled to wiring LPV. A gate of transistor TP
32
and a gate of transistor TN
32
are coupled to each other and receive a potential of an output node of inverter INV
2
. A gate of transistor TN
31
is coupled to wiring LNV. The coupling node coupling transistor TP
32
to transistor TN
32
is an output node of inverter INV
3
and this output node is connected to an input of inverter INV
1
. A potential of an output node of inverter INV
3
is applied as an VCO output to the outside of VCO circuit
8000
.
FIG. 21
is a graph showing the relationship between control voltage VIN of VCO circuit
8000
shown in FIG.
20
and an output clock frequency f (which relationship will be referred to as “VCO characteristic” hereinafter).
According to the characteristic shown in
FIG. 21
, VCO circuit
8000
is designed to serve to, for example, output a high frequency clock. The frequency characteristic of VCO circuit
8000
is expressed by a curve CA in FIG.
21
. According to characteristic curve CA of VCO circuit
8000
, VCO circuit
8000
outputs an arbitrary frequency between a minimum oscillation frequency fmin and a maximum oscillation frequency fmax, e.g., a frequency f
1
, to the outside of VCO circuit
8000
as a VCO output.
With the configuration of VCO circuit
8000
, however, the frequency of the VCO output can be used as an oscillation frequency only within a determined frequency range (frequencies fmin to fmax). If VCO circuit
8000
oscillates with a low frequency of not more than minimum oscillation frequency fmin, in particular, the characteristic of VCO circuit
8000
disadvantageously becomes unstable. It is noted that an internal clock with such a relatively low frequency is necessary for LSI which generates an internal clock signal using a phased locked loop circuit (PLL circuit) including a VCO circuit to operate in, for example, a low consumption power operation mode.
Therefore, if an internal clock which oscillates with a frequency of not more than minimum oscillation frequency fmin, e.g., a frequency f
2
, it is necessary to separately provide another VCO circuit having a VCO characteristic expressed by a curve CB in FIG.
21
.
Conventionally, therefore, it is disadvantageously difficult for one VCO circuit to simultaneously obtain a high frequency clock with frequency f
1
shown in
FIG. 21 and a
low frequency clock with frequency f
2
shown in FIG.
21
.
To solve the above-mentioned disadvantages, Japanese Patent Laying-Open Nos. 7-74596, 3-259619 and 5-102801 disclose VCO circuits capable of controlling an oscillation frequency range more widely by setting the number of the stages of a ring oscillator circuit to be variable.
However, even these VCO circuits having the configurations described above have a disadvantage in that a circuit scale becomes relatively large so as to set the number of oscillation stages of the ring oscillator to be variable in an oscillation frequency region from low to high frequencies.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a voltage controlled oscillation circuit which has an easily controllable voltage controlled oscillation characteristic, and which can generate a high frequency internal clock and a low frequency internal clock while suppressing a circuit scale.
It is another object of the present invention to provide a voltage controlled oscillation circuit which enables a high frequency clock for high speed operation and a low frequency clock for a low consumption power operation to be outputted by one voltage controlled oscillation circuit.
In short, the present invention provides a voltage controlled oscillation circuit which is provided wi

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