Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-03-03
2004-12-14
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S063000, C345S068000, C345S089000, C345S077000, C345S076000, C345S690000, C345S691000, C345S692000, C345S693000, C345S064000, C345S212000, C345S214000, C345S204000
Reexamination Certificate
active
06831618
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for driving a display panel which employs a matrix display scheme.
2. Description of Related Art
As a display panel employing the matrix display scheme, for example, a plasma display panel (hereinafter called “PDP”) and an electroluminescent display (hereinafter called “ELD”) are known.
In display panels such as these PDP or ELD comprising light-emitting elements having only two states, “light-emitting” and “non-light-emitting”, a gray-scale drive is carried out using a sub-field method in order to obtain halftone brightness.
FIG. 1
shows a drive format for carrying out halftone drive of 256 levels using such a sub-field method.
As shown in
FIG. 1
, for realizing halftone drive of 256 levels, the display period of one field comprises eight sub-fields, sub-fields SF
1
through SF
8
. The following light-emission periods (the frequency of light emission) having lengths of period corresponding to each weighted bit digit of 8-bit pixel data are assigned to the sub-fields, respectively, for light-emitting drive. That is,
SF
1
:
128
(first bit)
SF
2
:
64
(second bit)
SF
3
:
32
(third bit)
SF
4
:
16
(fourth bit)
SF
5
:
8
(fifth bit)
SF
6
:
4
(sixth bit)
SF
1
:
7
(seventh bit)
SF
2
:
8
(eighth bit)
That is, these are set to each sub-field according to pixel data whether light-emission is carried out at the sub-field and thus a brightness expression of a 256-level gray scale can be realized by the combination thereof.
For example, when 8-bit pixel data (“00101000”) corresponding to a brightness level of “40” is supplied, light-emission is carried out only by sub-fields corresponding to the bit digit of logic level “1”, that is, only by SF
3
and SF
5
. According to this light-emission drive, since “32+8=40” frequencies of light emissions are carried out within the display period of one field, the display corresponding to a brightness level of “40” is visualized.
In order to produce a brightness expression of a gray scale using a display panel comprising light-emitting elements having only two states, “light-emitting” and “non-light-emitting”, the so-called sub-field method is used for a halftone drive which, divides the display period of one field into a plurality of sub-fields wherein a frequency of light emission (the number of light emissions) different from one another is defined.
In recent display devices used in computers or the like, the refresh rate can be changed in order to reduce flicker at the time of displaying images. That is, the refresh rate is increased to shorten the display period of one field, thereby preventing “flicker” on the screen.
However, in order to shorten the display period of one field in a display panel which employs the aforementioned sub-field method for carrying out gray-scale drive, the number of of light emissions (light-emission period) to be carried out in each sub-field must be reduced. Thus, this presented a problem that desired display brightness was unable to be obtained.
OBJECCT AND SUMMARY OF THE INVENTION
The present invention has been developed in order to solve the aforementioned problem. An object of the invention is to provide a drive method of display panels which is capable of changing the refresh rate of a display panel employing the matrix display scheme for gray-scale drive using the sub-field method without degrading display quality.
A method for driving a display panel, according to the present invention, allows for carrying out gray-scale drive of a display panel employing the matrix display scheme, the display panel having a plurality of pixel celss each formed at an intersection of a plurality of electrode rows arranged for each scanning line and a plurality of electrode columns arranged to intersect the electrode rows, the unit display period of an input video signal consisting of a plurality of divided display periods, the method comprising a steps of: carrying out a divided light-emission drive process for allowing selected ones of the pixel cells to emit light for a number of light emissions assigned to each of the divided display periods, in each of the divided display periods, wherein a number of execusions of the divided light-emission drive process within the unit display period is changed in response to a vertical synchronization frequency of the input video signal.
REFERENCES:
patent: 6222512 (2001-04-01), Tajima et al.
patent: 6243073 (2001-06-01), Kawamura et al.
patent: 6249265 (2001-06-01), Tajima
patent: 6249268 (2001-06-01), Tachibana et al.
patent: 6323880 (2001-11-01), Yamada
Saegusa Nobuhiko
Suzuki Masahiro
Hjerpe Richard
Zamani Ali
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