Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Mesa formation
Reexamination Certificate
2001-12-07
2004-10-05
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Mesa formation
C438S164000, C438S787000, C257S072000
Reexamination Certificate
active
06800502
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a thin film transistor, a method of producing the thin film transistor, a liquid crystal display, and a thin film forming apparatus. More particularly, the present invention relates to the structure of a gate insulating film in a thin film transistor of the reverse stagger type.
2. Description of the Related Art
FIG. 14
relates to a conventional ordinary liquid crystal display using thin film transistors (hereinafter referred to as TFTs). and illustrates one example of the structure of a TFT array board including TFTs of the reverse stagger type, gate lines, source lines etc. In such a TFT array board, as shown in
FIG. 14
, gate lines
50
and source line
51
are arranged on a transparent substrate in a matrix pattern. Each of areas surrounded by the gate lines
50
and the source lines
51
serves as one pixel
52
, and a TFT
53
is provided for each pixel
52
.
FIG. 15
is a sectional view showing a construction of the TET
53
.
In the TFT
53
, as shown in
FIG. 15
, a gate electrode
55
leading out of the gate line
50
is formed on a transparent substrate
54
, and a gate insulating film
56
is formed in covering relation to the gate electrode
55
. A semiconductor active film
57
made of amorphous silicon (a-Si) is formed on the gate insulating film
56
at a position above the gate electrode
55
. A source electrode
59
leading out of the source line
51
and a drain electrode
60
are formed to extend over the semiconductor active film
5
through an ohmic contact layer
58
which is made of amorphous silicon (a-Si:n
+
) containing an n-type impurity such as phosphorous, and then on the gate insulating film
56
. A passivation film
61
is formed in covering relation to the TFT
53
made up of the source electrode
59
, the drain electrode
60
, the gate electrode
55
, etc., and a contact hole
62
is formed in the passivation film
61
at a position above the drain electrode
60
. Further, a pixel electrode
63
formed of a transparent conductive film, such as indium tin oxide (hereinafter referred to as ITO), is filled in the contact hole
62
for electrical connection to the drain electrode
60
.
Of the components of the TFT thus constructed, the gate insulating film located between the gate electrode and the semiconductor active film is the most important component that dominates electrical characteristics and reliability of the TFT. Also, the gate insulating film is an element that is responsible for the occurrence of surface defects. For an amorphous-silicon TFT using amorphous silicon as a material of the semiconductor active film, a redundant structure endurable against defects has been tried by employing a two-layered gate insulating film structure wherein gate insulating films are formed as two stacked layers using different materials and different methods. In one example of such a structure, the two stacked layers are a dense film of Ta
2
O
5
formed by anode-oxidizing tantalum (Ta) of the gate electrode and a film of Si
3
N
4
deposited by the plasma CVD.
Regarding electrical characteristics of the TFT, generally-demanded capabilities of the gate insulating film are represented by a dielectric withstand voltage and a carrier mobility in the semiconductor active film. The dielectric withstand voltage is a problem inherently depending on the gate insulating film itself, whereas the carrier mobility in the semiconductor active film is affected by an interface characteristic between the gate insulating film and the semiconductor active film.
The term “dielectric withstand voltage” means a maximum voltage until which the gate insulating film is endurable against dielectric breakdown in a test wherein the voltage applied between the gate electrode and the semiconductor active film is increased gradually. If the dielectric withstand voltage is lower than a desired design value, the gate insulating film would be liable to break down, thus resulting in an operation failure of the TFT and hence a display failure.
Also, the term “mobility” means an index indicating easiness in movement of carries within the TFT. A larger value of the mobility represents a greater driving ability and a higher-speed operation of the TFT. The mobility lowers if traveling of carriers is impeded due to disorder of a semiconductor crystal and the presence of impurities. Taking electrons in silicon as an example, the mobility of electrons is about 1000 cm
2
/V·sec in a single crystal. However, the mobility lowers down to the order of 0-100 cm
2
/V·sec in polycrystalline silicon, and further down to the order of 0.3-1 cm
2
/V·sec in amorphous silicon. In other words, because the mobility lowers in the case of using amorphous silicon due to the inherent property, there has been a demand for maintaining the mobility as high as possible even to a small extent in such a case.
Although the dielectric withstand voltage and the carrier mobility are, as described above, important factors in achieving TFTs with good electrical characteristics and high reliability, the materials which have been usually employed for the gate insulating film in the past are not satisfactory from points of both the dielectric withstand voltage and the carrier mobility. Also, although it has been hitherto proposed to combine two kinds of layers for giving the gate insulating film desired capabilities like the above-mentioned example of the two-layered structure of Ta
2
O
5
and Si
3
N
4
, this method has such problems that the step of forming the gate insulating film is complicated and the productivity of TFT array boards is deteriorated.
SUMMARY OF THE INVENTION
With the view of solving the problems set forth above, an object of the present invention is to provide a TFT having a gate insulating film which has a high dielectric withstand voltage and can ensure a desired carrier mobility in an adjacent semiconductor active film, a method of producing the TFT, a liquid crystal display which is superior in electrical characteristics and yield, as well as a thin film forming apparatus adaptable in the method of producing the TFT.
To achieve the above object, in the TFT of the present invention, a gate electrode and a semiconductor active film are formed on a substrate with a gate insulating film, which is formed of two layered insulating films, located therebetween, the gate insulating film being made up of a first gate insulating film which is disposed on the same side as the gate electrode and improves a withstand voltage between the gate electrode and the semiconductor active film, and a second gate insulating film which is disposed on the same side as the semiconductor active film and improves an interface characteristic between the gate insulating film and the semiconductor active film.
In other words, the TFT of the present invention intends to realize a gate insulating film which has in itself a desired dielectric withstand voltage and renders the semiconductor active film to have a desired carrier mobility, by forming the gate insulating film with two layered insulating films made of such materials as functioning respectively to improve the withstand voltage between the gate electrode and the semiconductor active film, and to improve the interface characteristic between the gate insulating film and the semiconductor active film. The phrase “improve the interface characteristic between the gate insulating film and the semiconductor active film” used herein means that the carrier mobility in the semiconductor active film is improved as a result of forming the second gate insulating film.
Concrete examples of the materials usable as the first and second gate insulating films are as follows. The first and second gate insulating films are each formed of a silicon nitride film, the optical band gap of the first gate insulating film has a value in the range of 3.0 to 4.5 eV, and the optical band gap of the second gate insulating film has a value in the range of 5.0 to 5.3 eV.
Heretofore, it has been customary that an insulat
Berry Renee R.
Brinks Hofer Gilson & Lione
LG Philips LCD Co., Ltd.
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