System and method for combining multiple physical layer...

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels

Reexamination Certificate

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Details

C370S536000, C370S539000, C370S541000

Reexamination Certificate

active

06775305

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to high-speed data communications. More specifically, the invention relates to a system and method for combining a plurality of co-located physical layer transport links to form a virtual transport link that reuses standard asynchronous transfer mode (ATM) to physical layer interfaces (at both sides) while maintaining data sequence order.
BACKGROUND OF THE INVENTION
With the advancement of technology, and the need for instantaneous information, the ability to transfer digital information from one computing device to another has become more and more important. Various line bonding techniques have been applied to provide bandwidth on demand, e.g., by applying multiple integrated services digital network (ISDN) connections in parallel and controlling the number of connections as a function of the expected load, to provide a better granularity between the T1 and T3 (or E1 and E3) standard telecommunication rates, and to provide more robust data transport systems by introducing redundancy.
Various line bonding techniques sometimes referred to as inverse multiplexing have been implemented. In bit level multiplexing, incoming data is stripped into individual bit streams. Each stripped bit stream is communicated individually across a physical transport link. At the receiving end of the link, framing is performed to realign the various stripped bit streams received on the various physical transport links into the original data stream. Bit level multiplexing is frequently performed through hardware implementations at the physical layer. As such, bit level multiplexing offers a great deal of flexibility in designing a multi-transport link. In addition, bit level multiplexing at the physical layer has the advantage of reducing data transfer latency when compared to multiplexing methods that operate at a protocol data unit (PDU) level. However, the flexibility of bit level multiplexing solutions requires the integration of hardware to identify, coordinate in time, and possibly error correct the various transmitted bit streams stripped from the original data stream. Bit level multiplexing solutions are difficult to implement when the various physical transport links operate at different bit rates. Still another drawback related to bit level multiplexing solutions is that they do not take advantage of the redundancy provided in the multiple physical transport links, if one link fails, every PDU is lost until an operable line bonding solution is configured. Because bit level multiplexing solutions are hardware solutions both the source and the destination devices must be configured with suitable hardware to strip and transmit a plurality of bit streams near a source computing device and receive and reassemble the transmitted bit streams near the destination computing device. The hardware intensive nature of bit level multiplexing solutions restricts such solutions to bandwidth on demand requests in proprietary intranets or between computing devices that use designated communication links that follow a particular bit sequencing standard to transfer information. As a result, bit level multiplexing solutions are not easily adaptable at the interface between an ATM layer device and a physical layer device.
Multi-link point to point protocol (PPP) is an Internet engineering task force (IETF) request for comments (RFC) communication standard that functions at a data packet level. Multi-link PPP inserts a sequence number to ensure that the virtual link preserves the original data packet sequence order at a destination-computing device. Multi-link PPP is a software solution that provides for the use of multiple simultaneous channels between systems, giving users bandwidth on demand. Multi-link PPP uses a combination of a four byte sequencing header with synchronization rules to split packets among parallel communication paths between systems such that the data packets do not become reordered at the destination device. Because multi-link PPP is a software solution both the source and the destination devices must be configured with a suitable processor and memory to store the necessary program code. This requirement limits multi-link PPP to the application of intersystem communication links as the additional hardware and firmware required to perform a multi-link PPP data transfer at an interface between an ATM layer device and a physical layer device makes such a transfer impractical as multi-link PPP is not directly suitable for ATM transport, even if ATM encapsulation in PPP could be envisaged.
Inverse multiplexing for ATM is an ATM forum standard defined for communication systems carrying ATM cells. The standard is quite complex and only applicable when the various transport links used in a transport bundle have nominally the same bit rate (e.g., all transport links are T1 links). Inverse multiplexing for ATM (IMA) is typically implemented by a mixture of hardware and software. IMA is complex both in defining the corresponding framing, typically performed in hardware, and in defining the control mechanism to establish and control bundles, usually performed in software.
In an IMA communication system, cell traffic is transported using a time division multiplexing technique over several channels (typically T1 or E1 data links). In a cell based IMA system, these ATM cells or payload cells are sent on each channel in a round-robin fashion using an identical period for each of the transport links. The IMA communication system relies on synchronized system clocks to inverse multiplex and reassembles data packets in the correct order.
For transmission of data beyond a local area, communication is typically achieved by transmitting data from source to destination computing devices through a network of intermediate switching nodes. These nodes are not concerned with the content of the data. Rather, their purpose is to provide a switching facility that will transport the data from node to node until the data reaches its target destination (e.g., a computing device).
FIG. 1
illustrates a prior art communication system
1
that uses a plurality of ATM switching nodes to transfer data to and from a plurality of computing devices. More specifically, the communication system
1
comprises computing devices
15
a
-
15
d
, herein labeled, “A, B, C, D” in communication with each other via communication links
11
and an ATM switching network
10
. As illustrated in
FIG. 1
, the ATM switching network
10
comprises a first ATM node
13
a
in communication with a second ATM node
13
b
via a plurality of links
16
. As indicated above, these links
16
may comprise a plurality of standard T1, T3, E1, E3, or other data communication links with the same bit rate. The first ATM node
13
a
may comprise a first ATM switch
12
a
and a first ATM inverse multiplexer (AIM)
14
a
. The second ATM node
13
b
may comprise a second AIM
14
b
coupled to a second ATM switch
12
b
. As also illustrated in
FIG. 1
, the second ATM switch
12
b
of the second ATM node
13
b
may be in communication with computing devices
15
c
,
15
d
, “C” and “D”, via designated data communication links
11
.
In a well known manner, a cell stream originating at computing device
15
b
(B) and having cell headers that designate computing device
15
d
(D) as their destination, may be transmitted along communication link
11
to the first ATM switch
12
a
within the first ATM node
13
a
of the ATM switching network
10
. The first ATM switch
12
a
uses information in the cell header of each of the cells comprising the cell stream to identify an appropriate destination ATM switch
12
b
. Those skilled in the art will appreciate that an ATM switch
12
a
may be in communication with a plurality of remotely located ATM switches
12
via a plurality of designated AIM devices
14
and links
16
. For simplicity of illustration and description, only two ATM switches
12
a
,
12
b
are illustrated in the ATM switching network
10
of FIG.
1
. In the exemplary communication system illust

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