Semiconductor device with phase comparator comparing phases...

Details Semiconductor device with phase comparator comparing phases... Semiconductor device with phase comparator comparing phases...

2001-07-18

2004-12-21

Pert, Evan (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S763010

Reexamination Certificate

active

06833723

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having an integrated circuit, and more particularly, it relates to an improvement for enabling direct detection of the phase of an internal signal of the integrated circuit on the outside of the semiconductor device.
2. Description of the Background Art
A generally known semiconductor device having an integrated circuit in a semiconductor chip is so structured as to output an internal signal generated in the integrated circuit to an external device as a monitor signal in response to an externally input mode switching signal.
FIG. 20
is a circuit diagram showing part of a conventional semiconductor device having such a structure. When an externally input mode switching signal SMM is active (high in the example shown in FIG.
20
), an internal signal is output as a monitor signal through a NAND circuit
90
serving as a logic switch and an inverter
91
. The monitor signal is output to bonding pads formed on the semiconductor chip or external pins which are terminals exposed outward from a sealing body. Another known semiconductor device outputs a monitor signal to an NC (Non-Connect) pin among external pins. The mode switching signal SMM has a function of switching the operation mode of the semiconductor device between a normal operation mode implementing the original function of the integrated circuit and a test mode for monitoring the internal signal.
Thus, a semiconductor device directly outputting an internal signal to bonding pads of a semiconductor chip or external pins of the semiconductor device by shifting its operation mode to a test mode has been known in general. Following recent increase in speed and frequency of the integrated circuit, however, it is necessary not only to simply monitor the internal signal but also to control phase difference at a local level in the semiconductor chip. This is because a setup time between two signals is so reduced in response to the increased speed that internal timing in the semiconductor chip must inevitably be settled even if the timing of an external signal is settled. In order to ascertain the operation limit of the integrated circuit, timing accuracy is required not only on the external pins but also in the semiconductor chip. Under such circumstances, awaited is a semiconductor device enabling phase comparison between signals at the internal level of the semiconductor chip.
FIG. 21
is a circuit diagram showing an exemplary circuit employed in an SDRAM (synchronous dynamic RAM). This circuit is so structured as to compare phases between a signal EXTCKE (external clock enable signal) and a signal EXTCLK (external clock signal). The signal EXTCKE is buffered by a clock buffer
92
, to thereafter control clocked inverters
94
and
97
as a signal INTCKE (internal clock enable signal). The signal EXTCLK is buffered by a clock buffer
93
, passed as a signal INTCLK (internal clock signal) through the clocked inverter
94
, a latch formed by two inverters
95
and
96
, the clocked inverter
97
and a latch formed by two inverters
98
and
99
, and thereafter transmitted to an integrated circuit as an internal signal.
The signal EXTCLK or INTCLK, supplied from a clock generator (not shown) in a constant cycle, is not arbitrarily changeable. On the other hand, the signal EXTCKE or INTCKE is an asynchronous signal arbitrarily changeable in timing with respect to the signal EXTCLK or INTCLK. As shown in a timing chart of
FIG. 22
, therefore, an internal signal is changed by changing the timing of the signal EXTCKE.
Referring to
FIG. 22
, the signal EXTCKE is low and the internal signal is undefined at a time t
0
. A hatched part in
FIG. 22
expresses that the value of the internal signal is undefined. The signal EXTCKE goes high at a time T
1
, and goes low at a time T
4
. When the signal INTCLK is high between times T
2
and T
3
, the internal signal is also high. When the signal INTCLK goes high after the time T
4
, however, the signal INTCLK (part denoted by symbol P in
FIG. 22
) is not reflected on the internal signal. In other words, an operation neglecting the signal INTCLK appears on the integrated circuit when the signal INTCKE is low. Thus, the operation of the integrated circuit varies with the phase relation between the signals INTCLK and INTCKE, and hence the phase difference between the two signals can be indirectly monitored by varying the timing of the signal EXTCKE and investigating the current operation of the integrated circuit.
However, the circuit shown in
FIG. 21
is employed in a normal operation mode, and hence phase difference between an arbitrary internal signal and an external signal cannot be monitored with the circuit shown in FIG.
21
. Further, the phase difference between two signals can be not directly but only indirectly monitored through the operation of the integrated circuit.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device enabling direct detection of the phase of an internal signal and a method of inspecting this semiconductor device.
According to a first aspect of the present invention, a semiconductor device has M (M≧1) semiconductor substrates, and each of the M semiconductor substrates comprises an integrated circuit, a phase comparison circuit comparing phases between an internal signal generated in the integrated circuit and an external signal input from outside the semiconductor device and outputting the result as a monitor signal and a monitor signal pad for outputting the monitor signal.
The semiconductor device according to the first aspect compares the phases in each semiconductor substrate, whereby precision of the signal phases can be determined in the semiconductor substrate. Therefore, phase difference can be controlled at a local level in the semiconductor substrate. Further, the monitor signal reflecting the phase difference can be extracted outward through the monitor signal pad, whereby the phase difference can be directly monitored.
According to a second aspect of the present invention, a semiconductor device has M (M≧1) semiconductor substrates, and each of the M semiconductor substrates comprises an integrated circuit having a data wire for outputting a data signal, a phase comparison circuit comparing phases between an internal signal generated in the integrated circuit and an external signal input from outside the semiconductor device and outputting the result as a monitor signal and a first drive circuit outputting the monitor signal to the data wire.
The semiconductor device according to the second aspect compares the phases in each semiconductor substrate, whereby precision of the signal phases can be determined in the semiconductor substrate. Therefore, phase difference can be controlled at a local level in the semiconductor substrate. Further, the monitor signal reflecting the phase difference can be extracted outward through the data wire, whereby the phase difference can be directly monitored. In addition, neither pad nor terminal is required for extracting the monitor signal outward.
According to a third aspect of the present invention, the integrated circuit further has a second drive circuit outputting the data signal to the data wire, the phase comparison circuit compares the phases and the first drive circuit outputs the monitor signal to the data wire only when a mode switching signal input from outside the semiconductor device is at a specific value, and the second drive circuit outputs the data signal to the data wire only when the mode switching signal is not at the specific value, in the semiconductor device according to the second aspect.
In the semiconductor device according to the third aspect, the first and second drive circuits so exclusively operate that signal collision can be prevented on the data wire.
According to a fourth aspect of the present invention, the phase comparison circuit compares the phases only when a mode switching signal input from outside the semiconductor d

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