Multi-phase mixer

Details Multi-phase mixer Multi-phase mixer

2000-10-16

2004-10-05

Chin, Stephen (Department: 2634)

Pulse or digital communications

Receivers

Angle modulation

C455S130000, C455S180300, C375S359000, C375S374000

Reexamination Certificate

active

06801585

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to mixers for use in wireless transceivers, specifically a multi-phase mixer.
The field of wireless technology is currently undergoing a revolution, and is experiencing exponential growth. Cell phones, once considered a novelty and referred to as “car phones” are now ubiquitous, and cordless phone in the home are commonplace. A whole new batch of wireless personal digital assistants, and Bluetooth enabled computer peripherals are now entering the market, with wireless internet access as a driving force. A multi-phase mixer is described which will facilitate the design and lower the cost of circuits for these and related products.
Wireless devices typically transmit and receive data through the air on high frequency electromagnetic waveforms, though some systems, such as satellite dishes and pagers simply receive, and others merely transmit. Data transmission is begun by encoding the data to be transmitted. This encoded data typically has a data rate of 100 kHz to 100 MHz and modulates a high frequency carrier signal. The carrier signal is often in the 2-10 GHz range. The modulated carrier signal is then applied to an antenna for broadcasting. The broadcast signal is referred to as a radio frequency (RF) signal. Reception involves receiving the RF signal on a different antenna, and filtering undesired spectral components. The signal is demodulated, filtered again, and decoded.
It is very difficult to handle and generate these high frequency carrier and RF signals. Accordingly, receivers and transmitters are designed to have a minimum amount of circuitry operating at or near these rates. Transmitters are set up to modulate the carrier with the data right at the antenna. Receivers are organized to demodulate the RF to the data rate as soon in the signal path as possible.
Exacerbating this is the competitive nature of the wireless marketplace itself, which puts tremendous pricing pressure on systems manufacturers. Much of the system is on at least one integrated circuit, and that integrated circuit's price can be reduced by producing it using a comparatively inexpensive process. For optimal savings, a process no better than what is required to make a properly functioning circuit is used. The practical aspect of this is that devices handling the carrier frequency are operating above their f
beta
and near their unity gain frequency f
T
. In other words, the transistors in the integrated circuit have low gain and don't operate much like transistors at these frequencies. What is needed are methods and circuits for the modulation and demodulation of carrier signals that can alleviate these difficulties at high frequency.
CONVENTIONAL RECEIVERS AND MIXERS
FIG. 1
is a block diagram of a conventional receiver
100
for use in wireless systems. Specifically, a direct conversion receiver is represented. It may also be referred to as a low IF (intermediate frequency), zero IF, or hoinodyne receiver. Included is a low noise amplifier (LNA)
110
, a modulator or mixer
160
, low pass filter (LPF)
120
, digital signal processor (DSP)
130
, voltage controlled oscillator (VCO)
140
, and phase lock loop (PLL)
150
. The PLL
150
includes a frequency synthesizer, phase-frequency detector, and loop filter. A variable gain amplifier (VGA) may also be included. The DSP
130
includes an analog to digital converter (A/D).
The RF signal is received on an antenna coupled to line
105
. A choke filter may be used to remove unwanted spectral portions from the reception characteristics of line
105
. The RF signal is amplified by LNA
110
, and provided to the mixer
160
. LNA
110
may be a composite of more than one amplifier, for example a second LNA may be on a chip with the other blocks shown, while a first LNA may be off-chip. A VCO
140
generates a local oscillator (LO) signal on line
145
, and provides it to the mixer
160
and PLL
150
. The VCO may be on-chip or off-chip; alternately it may have its transistors on-chip, with some passive components external.
The mixer
160
multiplies the RFin signal on line
115
with the LO signal on line
145
. The mixer
160
outputs a signal on line IF
1
125
, which has spectral components at the two frequencies which are the sum and difference of the RFin and LO signals. Specifically, if the RFin and LO frequencies are both 2.4 GHz, IF
1
125
has components at DC (0 Hz) and 4.8 GHz.
LPF
120
filters the high frequency sum products of IF
1
while passing the low frequency difference components. A VGA may be used at this point to adjust the signal amplitude. The A/D converter in the DSP
130
digitizes the data, and DSP
130
decodes the data, and provides an output on line
155
. The DSP
130
provides feedback in the form of a digital signal, which is converted to an analog signal for controlling the gain of the VGA. PLL
150
provides the voltage which controls the VCO
140
's oscillation frequency. The control voltage is Vtune, and is output from the PLL
150
to the VCO
140
on line
175
. The PLL
150
divides the LO signal on line
145
and compares that to a reference frequency (REF) provided on line
165
. The LO frequency is adjusted accordingly.
A conventional mixer circuit
200
used in similar receivers is shown in FIG.
2
. The mixer has a first input port
245
labeled RFin, a second differential input port for receiving the LO signal and its complement LOS on lines
215
and
225
, and a differential output on lines
265
and
275
. Voltage changes at RFin generate a current in capacitor C
1
240
. This current modulates the tail current provided by M
3
230
under the control of the bias voltage on node
235
. This RFin modulated current is then multiplied in the mixer core M
1
210
and M
2
220
, resulting in the IF
1
output on the lines
265
and
275
;
1
he output IF
1
will have two frequency components, one at the sum of the frequency of the RFin and LO signals, and one at the difference.
In the receiver of
FIG. 1
, the LNA
110
, mixer
160
, VCO
140
, and frequency synthesizer portion of the PLL operate at or near the RF frequency. This leads to three difficulties. First, a large amount of the circuitry is running at high frequencies near their transistor's f
T
. Second, the LO signal on line
145
induces a signal on the RF line
105
, which is amplified by the LNA
110
, and mixed with the LO itself in mixer
160
. This is referred to as LO leakage. The result is a DC voltage which appears as a DC offset at IF
1
on line
125
. Third, the RF signal leaks onto the VCO, particularly at the point where external components may be connected. As the RF signal changes frequency, the VCO frequency tries to change. This is known as VCO pulling.
What is needed is a design innovation which would enable the use of comparatively inexpensive technology while still achieving the desired performance and solving the above problems. SUMMARY OF THE INVENTION
Accordingly, mixer circuits which reduce the amount of circuitry operating at or near the carrier frequency are disclosed. The mixer circuits also mitigate the LO-leakage and VCO-pulling problems.
In one embodiment, the present invention provides a wireless receiver apparatus including a VCO and mixer. The VCO provides a first signal having a first frequency, and a second signal having the first frequency. The first and second signals are in quadrature. The mixer has a first input port for receiving the first signal, and a second input port for receiving the second signal, a third input port for receiving a third signal centered about a third frequency. The mixer generates a fourth signal having a frequency centered about the third frequency less twice the first frequency.
In another embodiment, the present invention provides a mixer including a first port for receiving a first signal having a first frequency; a third port for receiving a third signal having a third frequency; and a fourth port for outputting a fourth signal having a fourth frequency. A mixer core for doubling the first frequency of the first s

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