Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2003-07-29
2004-12-28
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S691000, C257S706000, C257S712000, C257S718000, C257S719000, C257S726000, C361S712000, C361S714000
Reexamination Certificate
active
06836005
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor device. More particularly, the present invention relates to a semiconductor device with a semiconductor package.
2. Description of the Background Art
A conventional semiconductor device with a semiconductor package is disclosed, for example, in Japanese Patent Laying-Open No. 11-204679.
In the semiconductor device disclosed in the above document, a semiconductor chip has an upper surface with a plurality of power-supply signal lines for providing a power supply and has a lower surface with a plurality of electrodes for a signal for exchanging signals. The semiconductor chip is enclosed in a package. A power supply interconnection line formed externally to the package contacts an electrode for a power supply and a printed circuit board.
Such a semiconductor device has a problem that the power supply interconnection line tends to peel off the printed circuit board easily, resulting in deterioration of the reliability of the semiconductor device.
SUMMARY OF THE INVENTION
The present invention is made to solve the problem as described above. An object of the present invention is to provide a highly reliable semiconductor device.
A semiconductor device in accordance with the present invention includes a semiconductor package, a substrate, a metal substrate, and a metal fixing member. The semiconductor package has a first main surface, a second main surface provided opposite to the first main surface, a first terminal provided at the first main surface, a second terminal provided at the second main surface, and a semiconductor element. The substrate has a third main surface opposing the first main surface, a fourth main surface provided opposite to the third main surface, a third terminal contacting the first terminal, and a fourth terminal provided at the fourth main surface. The metal substrate has a fifth main surface opposing the second main surface and electrically connected to the second terminal, and a sixth main surface provided opposite to the fifth main surface. The fixing member contacts the sixth main surface to position the metal substrate. The substrate is provided with a hole passing through the substrate. A portion of the fixing member is inserted into the hole, and a tip of the fixing member contacts the fourth terminal.
In the semiconductor device configured as described above, a portion of the metal member is inserted into the hole, and the tip of the metal member contacts the fourth terminal. As a result, the tip of the metal member presses against the fourth main surface provided with the fourth terminal. In addition, another portion of the fixing member presses against the third main surface of the substrate via the metal substrate and the semiconductor package. As a result, the metal substrate, the semiconductor package, and the substrate are sandwiched together by the metal fixing member. Accordingly, a separation of the fixing member from the substrate can be prevented. Consequently, a highly reliable semiconductor device can be provided.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 5920119 (1999-07-01), Tamba et al.
patent: 6282095 (2001-08-01), Houghton et al.
patent: 6512675 (2003-01-01), Tarter et al.
patent: 11-145322 (1999-05-01), None
patent: 11-204679 (1999-07-01), None
patent: 11204679 (1999-07-01), None
Thomas Tom
Warren Matthew E.
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