Testing apparatus embedded in scribe line and a method thereof

Details Testing apparatus embedded in scribe line and a method thereof Testing apparatus embedded in scribe line and a method thereof

2002-05-21

2004-10-26

Zarneke, David A. (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

Reexamination Certificate

active

06809541

ABSTRACT:

This application incorporates by reference Taiwanese application Serial No. 90112307, filed May 22, 2001.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a testing method and a testing apparatus, particularly, to a testing apparatus embedded in a scribe line and applicable to a digital testing machine.
2. Description of the Related Art
The manufacturing of integrated circuits (ICs) on a wafer comprises steps of deposition, diffusion, patterning, etching and so forth.
FIG. 1
shows a wafer
100
after the semiconductor manufacturing process is accomplished thereon. The dies
102
are separated by scribe lines
104
, which are areas for dicing the wafer. Firstly, the wafer
100
needs to be processed with a chip-probing (CP) test, which can filter out the failed dies
102
produced in the manufacturing of the semiconductor. Then, the wafer
100
is diced along the scribe lines
104
and thus many small dies
102
are created. Finally, dies
102
are packaged and processed with a final test to filter out the failed dies
102
produced in the packaging.
For illustration, a data driving IC of a liquid crystal display (LCD) die is taken as the example. Each data driving IC consists of a plurality of outputs, and each output represents an analog gray-scale value of up to 64 or up to 256. The chip-probing (CP) test of a data driving IC is processed by an analog testing machine to check the precision of the outputs from the data driving ICs. The performance of the analog testing machine generally satisfies the user's requirements.
However, the speed of testing usually does not satisfy the requirement of user. For instance, each analog testing machine comprises 2, 4, 6, or 8 channels, which means that the data driving IC's outputs with the numbers of 2, 4, 6, or 8 can be tested at the same time. Usually, each data driving IC comprises 384 outputs; each output represents a gray-scale value of up to 64; each gray-scale value consists of positive and negative polarities; thus, the number of samples needed to be tested for each data driving IC is 384*64*2=49,152. Accordingly, the test time takes about 1 sec. If each output represents a the gray-scale value of up to 256, the test time will be about 10 seconds, with the number of samples being 196,608. Although a data driving IC with more outputs produces a higher quality display, it also rapidly increases the cost of testing due to the high cost of the testing facility.
SUMMARY OF THE INVENTION
The object of the present invention therefore is to provide a testing apparatus embedded in a scribe line and a testing method thereof, which can increase the testing speed and decrease the testing cost.
The testing apparatus is used to check the level of precision of (n−1) voltages to be measured and comprises a multiplexer and a comparator. The multiplexer comprises n inputs for receiving the (n−1) voltages to be measured or a calibration voltage and comprises one output for outputting a multiplexing voltage according to a selection signal, wherein the multiplexing voltage is one of the (n−1) voltages to be measured and the calibration voltage. The comparator receives a reference voltage and the multiplexing voltage and then outputs a digital result by comparing the reference voltage and the multiplexing voltage.
The testing method applied in the testing apparatus is also disclosed in the present invention. Firstly, the comparators are grouped into m types, wherein the different types correspond to the different offset voltages of the comparators. Then, the voltages to be measured and a comparison voltage are applied to comparators of the kth type, wherein the comparison voltage is the reference voltage plus the offset voltage. Finally, precision levels of the voltages to be measured are checked according to the digital signals outputted from the comparators.


REFERENCES:
patent: 4956602 (1990-09-01), Parrish
patent: 4961053 (1990-10-01), Krug
patent: 5446395 (1995-08-01), Goto
patent: 6133582 (2000-10-01), Osann et al.
patent: 6275085 (2001-08-01), Mullarkey

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