Elevated-gate field effect transistor structure and fabrication

Details Elevated-gate field effect transistor structure and fabrication Elevated-gate field effect transistor structure and fabrication

1995-04-20

1996-04-16

Monin, Jr., Donald L.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

257283, 257286, 257472, H01L 2980, H01L 2702

Patent

active

055085393

ABSTRACT:
A field effect transistor (10) has an active layer (16) formed in a substrate (12). A gate (20) is disposed on an elevated platform (18) formed from the active layer (16). The elevated platform (18) raises the bottom surface (21) of the gate (20) relative to the top surface (34, 36) of the active region (13) on either side of the gate (20). A fabrication method for the transistor (10) forms the elevated platform (18) by etching the active region surface (44) on both sides of the gate (20) so that the bottom surface (21) of the gate (20) is elevated relative to the top surface (34) of the surrounding active region (13). The gate (20) itself and/or a patterned photoresist layer (116) may be used as a mask for performing this etch.

REFERENCES:
patent: 4407004 (1983-09-01), Yeh
patent: 4587540 (1986-05-01), Jackson
patent: 4698654 (1987-10-01), Kohn
patent: 4755858 (1988-07-01), Thompson et al.
patent: 4768071 (1988-08-01), Etienne et al.
patent: 4845534 (1989-07-01), Fukuta
patent: 4960718 (1990-10-01), Aina
patent: 4965218 (1990-10-01), Geissberger et al.

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