Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area
Reexamination Certificate
2001-06-07
2004-05-25
Nguyen, Nam (Department: 1753)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Coating selected area
C205S125000, C205S170000, C205S181000, C205S183000, C205S187000, C205S220000, C205S221000
Reexamination Certificate
active
06740222
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention is directed, in general, to printed wiring boards (PWBs) and, more specifically, to a printed wiring board having a discontinuous plating layer and a method of manufacture thereof.
BACKGROUND OF THE INVENTION
Substrates used in integrated circuit (IC) packages provide mechanical support for, and the electrical interconnections of, the IC to a circuit board. As such, the composition of these substrates has long been the subject of development effort in the manufacturing community. Of the available materials for use as the printed circuit core of a substrate, fiberglass/epoxy resin has emerged as the most common. Other materials, such as ceramic and copper, are also available, however they are more often directed to special uses.
Typically, the substrates used for IC packages are multi-layer, and usually formed from about four to eight different layers. As such, some or all of the multiple layers are interconnected in different areas to provide conductive pathways between the top surface of the substrate, to which an IC is mounted, to the bottom of the substrate where solder balls are attached for interconnection to a circuit board, such as a motherboard. Perhaps the most common technique for providing such interconnections on opposing sides of a substrate are conductive vias drilled through the various layers to couple together the conductive layers on both sides of the substrate. Once the interconnections are formed, contact pads may be formed over portions of the conductive layers using electroplating techniques, such as gold-over-nickel electroplating. Although electro-less techniques are also an option for depositing the gold-over-nickel over the conductive layers, reliability concerns of the resulting contact pads often lead manufacturers towards an electroplating process. For example, electro-less techniques often result in brittle, weak solder connections between the contact pads on the substrate and the contact pads on the motherboard or IC.
The conventional electroplating process uses electrical current to electrically deposit the contact layer, commonly gold over nickel, over a conductive layer typically made of copper. As such, the contact layer is electroplated only on exposed portions of the conductive layer, which provide a conduit for the electrical current. In many cases, the conductive layers are applied by a combination of electro-less and electroplating techniques, or even by the use of a thin metal layer deposited by vapor deposition techniques that runs to the outer edge of the substrate. Alternatively, the conductive layers may also be applied using electroplating techniques. Once the electroplating of the contact layers over the conductive layers has been completed, the conductive layers previously used to conduct current simply remain within the PWB's substrate. These remaining pieces are known as “plating bars” or “tie bars.”
Although used extensively in the manufacturing processes found in the prior art, the presence of these plating bars presents several problems for manufacturers in the industry, as well as consumers of the finished substrate. Specifically, such plating bars, since they are not used in the finished product, occupy space that may be better filled with useful circuitry. In addition, since plating bars typically run throughout an entire substrate, these bars run to the edges of the finished substrates formed when a larger substrate is severed into individual pieces. Since these plating bars are exposed along the edges of the now-severed substrates and they extend extensively throughout the substrate, they often become antennae causing electrical interference that may affect the overall substrate performance. For example, interference caused by the plating bars may include electrical noise and cross-talk among the various conductive materials in the substrate. Such interference may become especially problematic in those substrates used in high frequency devices.
Although techniques are available to remove some of plating bars after their use in the gold-over-nickel electroplating process, these techniques typically only remove those bars located on the surface of the substrate since they are accessible from without the substrate. However, the plating bars located within the multiple layers of the substrates cannot be removed from the finished product since they have become integrated into the circuit structure of the substrates.
Accordingly, what is needed in the art is a process for constructing substrates that allows electroplating the contact layers on a substrate without leaving plating bars throughout the finished substrates.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the prior art, the present invention provides a method of plating an electrical contact on a substrate. In one embodiment, the method includes forming electrically connected plating layers on first and second opposing sides of a substrate. Then, the method includes electroplating a contact layer over each of the plating layers using the plating layers. The method further includes removing a portion of the plating layers from the first and second opposing sides while leaving the plating layers under the contact layer. This method can also be used to manufacture a substrate, which is yet another embodiment covered by the present invention.
In yet another aspect, the present invention provides a substrate having dielectric layers located on opposing first and second sides of a substrate and having openings formed therein. The substrate further includes a metallized via extending through the substrate and having a via metal extending therefrom where the openings contact the via metal. The substrate also has a discontinuous plating layer located within each of the openings and contacting the via metal. The substrate still further includes an electroplated contact layer located over each of the discontinuous plating layers where the electroplated contact layers are electrically connected to each other by the via metal.
The foregoing has outlined advantageous and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiments as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention in its broadest form.
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patent: 4789648 (1988-12-01), Chow et al.
patent: 4812213 (1989-03-01), Barton et al.
patent: 5262041 (1993-11-01), Gulla
patent: 6015482 (2000-01-01), Stern
patent: 6162365 (2000-12-01), Bhatt et al.
patent: 6254758 (2001-07-01), Koyama
patent: 2001/0004489 (2001-06-01), Lim
Agere Systems Inc.
Mutschler Brian L.
Nguyen Nam
LandOfFree
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