Etching a substrate: processes – Forming or treating electrical conductor article
Reexamination Certificate
2000-08-25
2004-10-12
Alanko, Anita (Department: 1765)
Etching a substrate: processes
Forming or treating electrical conductor article
C216S034000, C216S083000, C205S086000, C205S166000, C205S167000, C205S169000, C205S183000, C205S184000, C427S096400, C427S098300, C427S165000, C427S305000, C427S306000, C427S555000, C427S581000, C427S126500, C427S126600
Reexamination Certificate
active
06802985
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method for fabricating metal wirings used for flat panel displays such as liquid crystal displays (LCDs), plasma display panels (PDPs), electrochromic displays (ECDs) and electroluminescent displays (ELDs), printed wiring boards using ceramic boards, and other various fields.
Conventionally, in a flat panel display typified by LCDs, normally, display material such as liquid crystals is held between a pair of substrates and a voltage is applied to this display material. In this case, electrical wiring lines are arrayed on at least one of the substrates.
For example, in the case of an active matrix drive type LCD, on one of a pair of substrates constituting part of a display unit, gate electrodes and data electrodes are disposed in a matrix shape, and thin film transistors (TFTs) and pixel electrodes are disposed at individual intersections of these electrodes. Normally, these gate electrodes and data electrodes are made of a metal material such as Ta, Al or Mo, and deposited by a dry film formation process such as sputtering process.
In such flat panel displays, in an attempt to implement larger areas and higher definitions, the drive frequency would increase while the electric wiring resistance as well as the parasitic capacitance would increase. As a result of this, delay of driving signals would come up as a large problem.
Thus, in order to solve the problem of the delay of driving signals, there have been made attempts to use Cu (bulk resistivity: 1.7 &mgr;&OHgr;·cm), which is lower in electrical resistance, instead of Al (bulk resistivity: 2.7 &mgr;&OHgr;·cm), &agr;-Ta (bulk resistivity: 13.1 &mgr;&OHgr;·cm) or Mo (bulk resistivity: 5.8 &mgr;&OHgr;·cm), which are conventional wiring materials. For example, “Low Resistance Copper Address Line for TFT-LCD” (Japan Display '89, pp. 498-501) discloses discussion results on a case of using Cu as the gate electrode material of TFT-LCDs. According to this literature, it is expressly described out that because a Cu film deposited by sputtering process is poor in adhesion with the ground glass, a metal film of Ta or the like needs to be interveniently provided as a ground film in order to enhance the adhesion.
However, in the case of the wiring structure in which a metal film of Ta or the like is provided as the ground, dry formation processes and etching processes would be involved individually for the Cu film and the ground metal film of Ta or the like, causing a process increase and leading to a cost increase, as a disadvantage.
Thus, in Japanese Patent Laid-Open Publication HEI 4-232922, there has been proposed a method in which while a transparent electrode made of ITO (Indium-Tin-oxide) or the like is used as a ground film, a metal film of Cu or the like is formed by plating technique on the ground film. In this technique, it is expressly described that since the plated metal can be formed selectively only on the ITO film, the patterning process is required only for the ITO film of the transparent electrode so that Cu wiring can effectively be formed even for large areas. The publication also describes that a metal film of Ni or the like having good adhesion with the ITO film is interveniently provided between the ITO film and Cu wiring.
On the other hand, in addition to the electrical wiring fabricating method described in Japanese Patent Laid-Open Publication HEI 4-232922, there have been proposed electrical wiring fabricating methods in which a film of Ni, Au, Cu or other metal is formed on a patterned ITO film by plating technique for various purposes such as the process reduction for the active matrix substrate, lower resistance of the transparent conductive film in simple matrix type LCDs or the like, and improvement solder wettability on the ITO film (see, e.g., Japanese Patent Laid-Open Publications HEI 2-83533, HEI 2-223924, HEI 1-96383, SHO 62-288883).
However, in the case where the Cu/Ta lamination film is formed by sputtering process, i.e., where both the Cu film for lower resistance and the ground metal film intended to improve the adhesion with the Cu film are formed by vacuum deposition equipment, individual film deposition processes are involved for the Cu film and the ground metal film, respectively, causing a process increase and leading to a cost increase, as a disadvantage. Also, individual etching processes are involved for the Cu film and the ground metal film, respectively, causing a process increase and leading to a cost increase, as a disadvantage.
Also, in the electrical wiring fabricating method in which ITO is used for the ground metal film, because the metal film is formed by wet formation technique while the ITO film is formed by vacuum deposition equipment for sputtering process, vapor deposition process or the like, enough cost reduction effect cannot be obtained, resulting in a problem that large-scale substrates cannot be easily managed.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide an electrical wiring fabricating method capable of fabricating the electrical wiring with low cost without using any vacuum deposition and managing large-scale substrates.
In order to achieve the above object, the present invention provides a method for fabricating metal wirings, comprising the steps of:
forming a ground resin film by applying a resin onto an insulating substrate;
patterning the ground resin film; and
forming a low-resistance metal film selectively on the patterned ground resin film by a wet film formation technique.
According to this invention, the ground resin film can be formed by spin coating, like resist or the like. The low-resistance metal film provided thereon can be formed selectively on the ground resin film by a wet film formation technique. Therefore, the need for vacuum deposition equipment, etching equipment or the like is eliminated.
As a result, it becomes possible to form metal wirings without using any vacuum deposition equipment, thus allowing a considerable cost reduction to be achieved as compared with the case where electrical wirings are formed by the method shown in the prior art example.
Also, since the ground film is made of resin, the film having good adhesion can be easily formed on the insulating substrate.
Further, since a wet film formation technique is used for film formation, the film formation can be achieved only by immersing the substrate into a solution, thus easily coping with large-scale substrates.
The wet film formation technique herein referred to is a technique that film formation is done by immersing the substrate into a solution without using any vacuum equipment, the technique being exemplified by plating process, electrolytic process, dip coating process, coating process or the like. In addition, such a film formation technique as shown in later-described Japanese Patent Laid-Open Publication HEI 10-245444 is also included in the scope of the wet film formation technique.
In one embodiment, the ground resin film is made of a photosensitive resin that can be patterned by exposure and development.
According to this embodiment, in addition to the foregoing effects, it becomes possible to easily form a high-definition film, as in the case of photoresist that is currently used. By using such a resin as those used for printed wiring boards, the ground resin film can be provided as a ground film that allows a single low-resistance metal film of, for example, Cu to be formed with good adhesion.
In one embodiment, the low-resistance metal film is a single layer film containing any one of Cu, Ni and Au or a multilayer film containing at least one of these single layers.
According to this embodiment, the low-resistance metal film is made of Cu, which has characteristics of low resistivity (bulk resistivity: 1.7 &mgr;&OHgr;·cm) and long life against electromigration, thus optimum as a wiring material.
Also, even with low adhesion between Cu and ground resin, low-resistance wirings of good adhesion with the ground resin can be achieved by using Ni of good adh
Chikama Yoshimasa
Izumi Yoshihiro
Alanko Anita
Alexander John B.
Conlin David G.
Edwards & Angell LLP
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