Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2000-10-24
2004-09-14
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S240000, C438S250000, C438S396000
Reexamination Certificate
active
06790741
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having capacitor elements, as well as to a process for producing the device. More particularly, the present invention relates to the structure of a high-dielectric-constant film or a ferroelectric film, both usable in capacitors of semiconductor integrated circuit and obtained by using organometal gases as the raw material, as well as to a method for forming such a film.
2. Description of the Prior Art
Active research and developments have been made in recent years on ferroelectric memories using ferroelectric capacitors, dynamic random access memories (DRAMs) using high-dielectric-constant capacitors, etc. These ferroelectric memories and DRAMs contain selective transistors, and each capacitor connected to one diffusion layer of each selective transistor functions as a memory cell and stores information. Ferroelectric capacitors use, as the capacitive insulating film, a ferroelectric film composed of Pb(Zr,Ti)O
3
(hereinafter referred to as PZT) or the like, and can store non-volatile information by polarizing the ferroelectric film. Meanwhile, high-dielectric-constant capacitors use, as the capacitive insulating film, a high dielectric-constant thin film composed of (Ba,Sr)TiO
3
(hereinafter referred to as BST) or the like, and accordingly can show a high capacitance and can be produced in a fine structure. When such a ceramic material is used in semiconductor capacitors, it is highly important that the ceramic material deposited on a lower electrode is divided electrically in order to obtain fine capacitors.
As the method for forming a thin ceramic film by deposition, there have been reported a sol-gel method, a sputtering method and a CVD method.
In the sol-gel method, organometal materials dissolved in an organic solvent are coated on a wafer having lower electrodes formed thereon, by spin coating, and the coated materials are subjected to crystallization by annealing in oxygen. In the method, the temperature needed for crystallization is very high because the crystallization takes place in a solid phase; and in the case of PZT, the crystallization temperature necessary for] achieving sufficient ferroelectric properties is 600° C. and, in the case of BST, the crystallization temperature for achieving sufficient high dielectric-constant properties is 650° C. In the above method, there is a problem that the orientation of the crystals formed is non-uniform. Furthermore, the sol-gel method is difficult to apply to wafers of large diameter because it is inferior in coatability on surface of different levels, and is not suitable for high integration of device.
In the sputtering method, reactive sputtering is conducted using a sintered ceramic target of the same material as the film to be formed and an (Ar+O
2
) plasma. A film is formed on a wafer having electrodes, and then the film is subjected to crystallization by annealing in oxygen. A uniform film is obtained by using a large-diameter target and a sufficient film formation rate is obtained by using a large power for plasma generation. In the sputtering method as well, however, a high temperature is needed for crystallization; in the case of PZT, the crystallization temperature for achieving sufficient ferroelectric properties is 600° C. and, in the case of BST, the crystallization temperature for achieving sufficient high-ielectric constant properties is 650° C. Further in the sputtering method, since the composition of the film obtained is decided substantially by the composition of the target used, a change in film composition requires a change of target, which is disadvantageous from the operational standpoint.
In the CVD method, a raw material mixture of gaseous state is transferred into a vessel accommodating a heated substrate to form a film therein. The CVD method is superior in film uniformity on large-diameter wafer as well as in coatability onto surface of different levels, and is considered to be promising as a technique enabling mass production of ULSI. The metals constituting the ceramic film formed include Ba, Sr, Bi, Pb, Ti, Zr, Ta, La, etc.; however, the hydrides or chlorides thereof appropriate for use as raw materials of CVD are very few in kind and, therefore, organometals of such metals are used in the CVD. These organometals, however, have low vapor pressures and are mostly solid or liquid at room temperature and are transferred by using a carrier gas.
In conducting such transfer, however, it is difficult to quantify the flow amount of organometal gases in carrier gas and accurately control the flow amount of organometal gases. It is because the carrier gas contains organometal gases in an amount larger than the amount corresponding to the saturated vapor pressure determined by the temperature of the raw material tank and because the flow amount of organometal gases is influenced not only by the flow amount of carrier gas but also by the surface area of solid raw materials, the temperature of raw material tank, etc. According to the description on the formation of a film of PTO (lead titanate, PbTiO
3
) by CVD, in Jpn. J. Appl. Phys. Vol. 32 (1993) p. 4175, the temperature of formation of PTO film is very high (570° C.) and the crystal orientation in film is not uniform.
In conventional production of ferroelectric memories or DRAMs, the dielectric film of capacitor has been formed by the above-mentioned methods. In these methods, however, the heating at high temperature such as about 600° C. or more in oxygen atmosphere is essential and the control of crystal orientation has been difficult.
Description is made on the structure of semiconductor device. In order to allow each ferroelectric capacitor or high-dielectric-constant capacitor of semiconductor device to function appropriately, it is necessary that either electrode of the capacitor is electrically connected to the diffusion layer of selective transistor. Conventional DRAMs have generally employed such a capacitor structure that a polysilicon connected to one diffusion layer of selective transistor is used as a electrode and a thin capacitive insulating film such as SiO
2
film, Si
3
N
4
film or the like is formed on the polysilicon. However, since the above thin ceramic film is an oxide, the polysilicon is oxidized when the film is formed directly on the polysilicon, and it is impossible to form a good ceramic thin film. Hence, p. 123 of 1995 Symposium on VLSI Technology Digest of Technical Papers describes a cell structure in which the upper electrode of capacitor and the diffusion layer are connected by local wiring of a metal such as Al or the like. Further, p. 843 of International Electron Devices Meeting Technical Digest, 1994 describes a technique of forming a PZT insulating film on a polysilicon using a TiN barrier metal with respect to DRAM, for example, p. 831 of International Electron Devices Meeting Technical Digest, 1994 describes a technique of forming a STO (strontinum titanate, SrTiO
3
) thin film as an insulating film on a RuO
2
/TiN lower electrode formed on a polysilicon plug, to form a capacitor.
In developing a fine capacitor structure, conventional methods for producing a ferroelectric film or a high-dielectric-constant film have had the above-mentioned problem that a high temperature is required for crystallization of insulating film and a problem associated with etching, described below.
High-dielectric-constant or ferroelectric capacitors have hitherto been produced as follows. First, as shown in FIG.
17
(A), element-isolating regions
111
, source/drain regions
112
, gate electrodes
113
, etc. are formed on a semiconductor substrate
110
. Then, as shown in FIG.
17
(B), an inter-layer insulating film
114
is formed by deposition and metal plugs
115
are formed, after which a lower electrode film
101
, a capacitive insulating film
102
and an upper electrode film
103
are formed in this order. Thereafter, dry etching is conducted from the upper electrode film to the lower electrode film to
Duy Mai Anh
Fahmy Wael
Hayes & Soloway P.C.
NEC Corporation
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