Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2002-06-27
2004-08-17
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S530000, C257S050000
Reexamination Certificate
active
06777773
ABSTRACT:
PRIOR ART
Three-dimensional memories, including memories fabricated with cells having antifuse layers, have been described in several prior art publications. Such publications include U.S. Pat. Nos. 5,835,396; 6,034,882; and PCT/US01/13575, filed Apr. 25, 2001.
In the process of fabricating three-dimensional memories, improvements to the cells have been discovered which enhance the cells' performance and manufacturability.
SUMMARY OF THE INVENTION
A memory cell for use in a three-dimensional memory having a plurality of such cells disposed at several levels above a substrate is disclosed. Each cell includes a first region of a first conductivity type doped to a level of at least 1×10
20
atoms cm
−3
. A second region of a second conductivity type is also used. An antifuse region is disposed between the first and second regions such that when the antifuse region is breached, a diode is formed. This occurs when the cell is programmed. In one embodiment, the very heavily doped first conductivity type region is a P type region, and the second region is an N type region doped to a level of approximately 1×10
17
atoms cm
−3
.
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patent: 5693556 (1997-12-01), Cleeves
patent: 6150705 (2000-11-01), Chen
patent: 6486065 (2002-11-01), Vyvoda et al.
patent: 6515888 (2003-02-01), Johnson et al.
Blakely , Sokoloff, Taylor & Zafman LLP
Matrix Semiconductor Inc.
Nguyen Thinh T.
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