Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2003-01-09
2004-10-12
Gurley, Lynne A. (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
Reexamination Certificate
active
06803241
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of monitoring contact holes of an integrated circuit. More particularly, the present invention relates to a method of monitoring contacts holes of an integrated circuit using corona charges to determine whether the contact holes are open.
2. Description of the Related Art
In general, when manufacturing integrated circuits, detecting whether contact holes are open is performed at an in-line state using an optical microscope or scanning electron microscope (SEM). However, due to a limited resolution inherent in the optical microscope, it is difficult to properly detect whether a fine contact hole is open with the optical microscope. Equally disadvantageously, it is impossible to detect the state of all chips (or dies) formed on a semiconductor wafer with the SEM, since a great deal of time is lost inspecting each sheet of a semiconductor wafer.
As a result, when manufacturing an integrated circuit, a process for detecting whether contact holes are open at an in-line state may be improperly carried out, thereby reducing the manufacturing yield.
SUMMARY OF THE INVENTION
In an effort to solve the problems described above, it is a feature of an embodiment of the present invention to provide a method of monitoring contact holes of an integrated circuit using corona charges at an in-line state when manufacturing an integrated circuit, to determine whether the contact holes are open.
To provide one feature of an embodiment of the present invention, there is provided a method of monitoring contact holes of an integrated circuit, the method including transmitting corona charges over a unit chip having contact holes on a semiconductor wafer; measuring a surface voltage of the unit chip; making a graph illustrating a relationship between the amount of corona charges transmitted and the measured surface voltage of the unit chip; and analyzing the graph to determine whether the contact holes of the unit chip are open. Determining whether the contact holes are open may be accomplished by determining a saturation level of the surface voltage of the unit chip or by determining if the surface voltage of the unit chip drops.
To provide another feature of an embodiment of the present invention, there is provided a method of monitoring contact holes of an integrated circuit, the method including transmitting corona charges over a unit chip having contact holes on a semiconductor wafer; measuring a surface voltage of the unit chip; making a graph illustrating a relationship between the amount of corona charges transmitted and the measured surface voltage of the unit chip; determining from the graph whether the measured surface voltage is saturated; and determining that the contact holes are not open when the measured surface voltage is not saturated and determining whether the contact holes are open when the measured surface voltage is saturated by comparing a measured surface saturation voltage of the unit chip with a predetermined surface saturation voltage of the unit chip. The unit chip may include a cell array region having regularly formed contact holes and a peripheral circuit region. Determining whether the contact holes are open may be accomplished by analyzing a difference between the measured surface saturation voltage of the unit chip and the predetermined surface saturation voltage of the unit chip. When the predetermined surface saturation voltage of the unit chip is a surface saturation voltage of a same unit chip having open contact holes and when the unit chip includes a cell array region having regularly formed contact holes and a peripheral circuit region, it may be determined that the contact holes are not open when the measured surface saturation voltage of the unit chip is higher than the predetermined surface saturation voltage of the unit chip.
To provide still another feature of an embodiment of the present invention, there is provided a method of monitoring contact holes of an integrated circuit, the method including transmitting corona charges over a unit chip having contact holes on a semiconductor wafer; measuring a surface voltage of the unit chip; making a graph illustrating a relationship between the amount of corona charges transmitted and the surface voltage of the unit chip; determining from the graph whether the measured surface voltage is saturated; and determining that the contact holes are not open when the surface voltage is not saturated, and determining whether the surface voltage drops when the surface voltage is saturated; determining whether the contact holes are open when the surface voltage drops by analyzing an extent that the surface voltage drops or a period over which the surface voltage drops, and determining whether the contact holes are open when the surface voltage does not drop by comparing a measured surface saturation voltage of the unit chip with a predetermined surface saturation voltage of the unit chip. The unit chip may include a cell array region in which the contact holes are uniformly formed. Determining whether the contact holes are open when the surface voltage does not drop may be accomplished by analyzing a difference between the measured surface saturation voltage of the unit chip and the predetermined surface saturation voltage of the unit chip.
As described above, in a method of monitoring contact holes of an integrated circuit according to the present invention, corona charges are transmitted over a unit chip having contact holes on a semiconductor wafer, the surface voltage of the unit chip is measured, and then whether the contact holes are open is monitored. Accordingly, it is possible to monitor whether contact holes are open at an in-line state during integrated circuit manufacture by transmitting corona charges onto a unit chip, thereby eliminating the need for a scanning electron microscope, and preventing a reduction in the manufacturing yield.
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Eom Tae-min
Jun Chung-sam
Yang Yu-sin
Gurley Lynne A.
Lee & Sterba, P.C.
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