Etching a substrate: processes – Nongaseous phase etching of substrate – Etching inorganic substrate
Reexamination Certificate
2002-12-20
2004-05-25
Kunemund, Robert (Department: 1765)
Etching a substrate: processes
Nongaseous phase etching of substrate
Etching inorganic substrate
C216S095000, C438S756000, C438S757000, C252S079100
Reexamination Certificate
active
06740248
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the field of semiconductor design and fabrication. Specifically, the invention relates to methods for removing dielectric layers from integrated circuit devices.
2. State of the Art
During manufacture of integrated circuit (IC) devices, dielectric layers are often used to aid the fabrication process. For example, to protect active areas of a silicon substrate during formation of oxide isolation regions (e.g., field oxide regions), a silicon nitride layer will be formed over the active areas of the substrate. While forming the oxide isolation regions, the surface of the silicon nitride layer becomes oxidized. After aiding the fabrication process, the oxidized silicon nitride layer must be removed.
Several processes are known to remove oxidized silicon nitride layers from IC devices. In one removal process, described in U.S. Pat. No. 3,709,749 and incorporated herein by reference, a substrate containing the oxidized silicon nitride layer is dipped in high-temperature (100° C.) water. Other removal processes use phosphoric acid (H
3
PO
4
). See, for example, W. van Gelder et al.,
Journal of the Electrochemical Society: SOLID STATE SCIENCE
, Vol. 114, No.8, pp. 869-872 (August 1967), U.S. Pat. No. 4,092,211, and K. Sato et al.,
Detailed Study of Silicon
-
Nitride
-
Etching Mechanism by Phosphoric Acid for Advanced ULSI Processing
(Abstract), Tohoku University (date unknown), the disclosures of which are incorporated herein by reference. At low temperatures, phosphoric acid is unable to significantly etch the silicon nitride because of its inability to appreciably attack the silicon oxide. Higher temperatures speed up the attack of the silicon oxide, but decrease the etch rate of the silicon nitride. As a result, it has been difficult to etch an oxidized silicon nitride structure using
In an attempt to increase the etch rate of silicon oxide at low temperatures, fluoroboric acid has been combined with phosphoric acid as described in U.S. Pat. No. 3,859,222, incorporated herein by reference. But adding fluoroboric acid has not significantly improved the ability of phosphoric acid to etch the oxidized silicon nitride structure without also attacking and degrading the oxide isolation regions.
Hydrofluoric (HF) acid has also been employed to etch oxidized silicon nitride structures. Unfortunately, the selectivity of HF acid is negative, or, in other words, HF acid severely etches silicon oxide to the extent of removing silicon oxide at a rate faster than silicon nitride, producing unfavorable geometry for further IC device processing. When a field oxide region is present, the negative etch selectivity removes large amounts of the field oxide region, thus impairing the ability of the field oxide to act as an isolating region.
Another removal process uses HF acid in a first step and phosphoric acid in a second step to etch oxidized silicon nitride structures. See U.S. Pat. No. 3,657,030, incorporated herein by reference. The HF acid etches off enough of the oxide surface to enable the phosphoric acid to attack the silicon nitride. Too little removal by the HF acid prevents the phosphoric acid from attacking the silicon nitride, while too much removal by the HF acid unduly depletes the oxide isolation regions. Etching with HF acid followed by phosphoric acid, however, also increases the materials used—each HF and H
3
PO
4
etching step is followed by a rinsing step, thus increasing the complexity and cost of the fabrication process.
SUMMARY OF THE INVENTION
The present invention provides a method of removing an oxidized silicon nitride layer from an IC device once it has served its purpose during fabrication. While removing the oxidized silicon nitride layer, the inventive method minimizes removal of desired isolation regions from the IC device. The method uses a two step process: one step to remove the oxidized portion of the oxidized silicon nitride layer; and a second step to remove the silicon nitride portion of the oxidized silicon nitride layer. In removing the oxidized silicon nitride layer, the method uses an acid solution exhibiting a positive etch selectivity, or ability to etch one material (i.e., silicon nitride) faster than a second material (i.e., silicon oxide).
The present invention includes a method for removing a plurality of dielectric films from a supporting substrate by providing a substrate with a second dielectric layer overlying a first dielectric layer, contacting the substrate at a first temperature with a first acid solution exhibiting a positive etch selectivity with respect to the second dielectric layer at the first temperature, and then contacting the substrate at a second temperature with a second acid solution exhibiting a positive etch selectivity with respect to the first dielectric layer at the second temperature. The first and second acid solutions preferably contain phosphoric acid. The first and second dielectric layers exhibit different etch rates in the first acid solution and the second acid solution. The first dielectric layer is preferably silicon nitride and the second dielectric layer is preferably silicon oxide. The second temperature is preferably lower than the first temperature.
The present invention yields several advantages over the prior art. One advantage is that the etch selectivity for silicon oxide-silicon nitride composite structures is improved, resulting in better geometry for further IC device processing. Another advantage, at least when the same acid is used as the first and the second etchant, is that the complexity and cost of the manufacturing process decreases because less wafer processing is necessary, i.e., separate rinsing and drying steps are not required.
REFERENCES:
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patent: 3709749 (1973-01-01), Sato et al.
patent: 3859222 (1975-01-01), Squillace et al.
patent: 4092211 (1978-05-01), Morris
patent: 4980017 (1990-12-01), Kaji et al.
patent: 5641383 (1997-06-01), Jun
patent: 5716884 (1998-02-01), Hsue et al.
patent: 5930650 (1999-07-01), Chung et al.
patent: 5933739 (1999-08-01), Lin
patent: 6087273 (2000-07-01), Torek et al.
patent: 6117351 (2000-09-01), Li et al.
W. van Gelder, et al., Journal of the Electrochemical Society: Solid State Science, vol. 114, No. 8, pp. 869-872, Aug. 1967.
K. Sato, et al., Detailed Study of Silicon-Nitride-Etching Mechanism by Phosphoric Acid for Advanced ULSI Processing (Abstract), Tohoku University—date unknown.
Li Li
Yates Don L.
Ahmed Shamim
Kunemund Robert
Micro)n Technology, Inc.
TraskBritt
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