Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Reexamination Certificate
2002-04-29
2004-05-18
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
C438S459000, C438S480000, C438S783000, C438S784000, C438S787000, C438S791000
Reexamination Certificate
active
06737337
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to the manufacture of semiconductor devices, and in particular to methods of preventing dopant depletion in active regions of such devices built on semiconductor-on-insulator (SOI) substrates.
2. Description of the Related Art
An insulated-gate field-effect transistor (IGFET), such as a metal-oxide semiconductor field-effect transistor (MOSFET), uses a gate electrode to control an underlying surface channel joining a source and a drain. The channel, drain and source are located in a semiconductor substrate, with the channel being doped oppositely to the drain and source. The gate electrode is separated from the semiconductor substrate by a thin insulating layer (i.e., a gate dielectric layer) such as an oxide. The operation of the IGFET involves application of an input voltage to the gate electrode, which sets up a transverse electric field in the channel in order to modulate the longitudinal conductance of the channel.
In typical IGFET fabrication processes, the source and drain are formed by introducing dopants of a second conductivity type (P or N) into the semiconductor substrate of a first conductivity type (N or P) using a mask. Other steps of IGFET fabrication processes, such as annealing, involve elevated temperatures.
For IGFETs built on SOI substrates, dopant migration into the buried oxide tends to occur during high temperature processing. This dopant migration occurs at higher rates for dopant materials with low atomic weights, such as boron. As active surface semiconductor regions get increasingly thin, as in a fully-depleted SOI devices, the dopant migration can lead to undesirable front channel doping changes, as well as undesirable lowering of the threshold voltage of the unwanted back channel region.
SUMMARY OF THE INVENTION
A method of manufacturing a semiconductor device includes forming a buried insulator layer of a semiconductor-on-insulator (SOI) wafer with a dopant material, such as boron, therein. The insulator layer with the dopant material may be formed by a number of methods, for example by thermal oxidation of a semiconductor wafer in the presence of an atmosphere containing the dopant material, by co-deposition of the insulator material and the dopant material, or by co-implantation of an insulator material and the dopant material. The dopant material may be the same as a dopant material in at least a region (e.g., a source, drain, or channel region) of a semiconductor material layer which overlies the insulator layer. The dopant material in the buried insulator layer may advantageously reduce the tendency of dopant material to migrate from the overlying material to the insulator layer, such as during manufacturing operations involving heating.
According to an aspect of the invention, a method of manufacturing a semiconductor device includes forming a semiconductor-on-insulator (SOI) wafer with a buried insulator layer that includes a dopant material therein.
According to another aspect of the invention, a method of manufacturing a semiconductor device includes forming a buried insulator layer that includes a dopant material therein, wherein the dopant material is placed in the insulator layer during formation of the insulator layer.
According to yet another aspect of the invention, a method of producing a semiconductor device includes the steps of: forming a semiconductor-on-insulator (SOI) wafer which includes a semiconductor bulk layer, a surface semiconductor layer, and an insulator layer between the semiconductor bulk layer and the surface semiconductor layer, wherein the insulator layer includes a dopant material; and forming source, drain and channel regions in the surface semiconductor layer, wherein at least one of the regions is doped with the dopant material.
According to still another aspect of the invention, a method of forming an semiconductor-on-insulator wafer includes the steps of implanting oxygen into a semiconductor wafer, and implanting a dopant material into the semiconductor wafer, wherein the implantations form a doped buried insulator layer in the wafer.
According to a further aspect of the invention, a method of forming an semiconductor-on-insulator wafer includes the steps of forming surface insulator layers on each of a pair of semiconductor wafers, wherein at least one of the surface insulator layers includes a dopant material; and joining the insulator layers together to form a unitary buried doped insulator layer.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.
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Chan Simon Siu-Sing
Xiang Qi
Advanced Micro Devices , Inc.
Niebling John F.
Renner , Otto, Boisselle & Sklar, LLP
Roman Angel
LandOfFree
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