Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2003-01-22
2004-09-28
Sherry, Michael (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S274000, C323S275000, C323S901000
Reexamination Certificate
active
06798179
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a stabilized direct-current power supply device such as a series regulator or switching regulator. More particularly, the present invention relates to soft starting of a stabilized direct-current power supply device.
2. Description of the Prior Art
FIG. 5
shows an example of the configuration of a conventional stabilized direct-current power supply device. The stabilized direct-current power supply device of
FIG. 5
is composed of an input terminal
1
, an output terminal
2
, a ground terminal
3
, an error amplifier
4
, a reference voltage circuit
5
, a control terminal
6
, a PNP-type transistor Q
1
, an NPN-type transistor Q
2
, and resistors R
1
to R
3
. All these circuit elements are integrated into a semiconductor integrated circuit device.
First, the configuration of the stabilized direct-current power supply device of
FIG. 5
will be described. The input terminal
1
is connected to the emitter of the transistor Q
1
. The collector of the transistor Q
1
is connected to one end of the resistor R
1
and to the output terminal
2
. The other end of the resistor R
1
is connected through the resistor R
2
to the ground terminal
3
. The node between the resistors R
1
and R
2
is connected to the inverting input terminal of the error amplifier
4
, and the output end of the reference voltage circuit
5
is connected to the non-inverting input terminal of the error amplifier
4
. The output terminal of the error amplifier
4
is connected to the base of the transistor Q
2
. The collector of the transistor Q
2
is connected to the base of the transistor Q
1
, and the emitter of the transistor Q
2
is connected through the resistor R
3
to the ground terminal
3
. The first supply power input terminal of the reference voltage circuit
5
is connected to the input terminal
1
, and the second supply power input terminal of the reference voltage circuit
5
is connected to the ground terminal
3
. The control terminal
6
is connected to the error amplifier
4
. The output terminal
2
and the ground terminal
3
are connected to a capacitor Co and a load RL provided outside the semiconductor integrated circuit device.
Next, the operation of the stabilized direct-current power supply device of
FIG. 5
will be described. The transistor Q
1
converts an input voltage Vin fed in via the input terminal
1
into an output voltage Vo, and feeds the output voltage Vo to the output terminal
2
. The resistors R
1
and R
2
constitute an output voltage detection circuit, which divides the output voltage Vo and delivers a divided voltage Vadj to the inverting input terminal of the error amplifier
4
. On the other hand, the reference voltage circuit
5
, operating on the input voltage Vin, produces a reference voltage Vref on the basis of the band-gap voltage, and feeds the reference voltage Vref to the no-inverting input terminal of the error amplifier
4
.
The error amplifier
4
amplifies the difference between the reference voltage Vref and the divided voltage Vadj, and outputs the amplified difference to the base of the transistor Q
2
. The transistor Q
2
amplifies the signal output from the error amplifier
4
and feeds it to the base of the transistor Q
1
in order to control the collector-emitter voltage of the transistor Q
1
. Moreover, by controlling a voltage applied to the control terminal
6
, the output of the error amplifier
4
is turned on and off.
As the amplified error signal output from the error amplifier
4
to the transistor Q
2
increases, the collector current of the transistor Q
2
increases. Accordingly, the base current of the transistor Q
1
increases, and thus the collector-emitter voltage of the transistor Q
1
decreases. Thus, the larger the amplified error signal, the higher the output voltage Vo.
The reference voltage Vref is so determined that, when the divided voltage Vadj is equal to the reference voltage Vref, the output voltage Vo is equal to the desired output voltage Vo*. Thus, feedback control is performed in such a way that the output voltage Vo is kept equal to the desired output voltage Vo*. The capacitor Co serves as an output phase compensating capacitor that stabilizes the output voltage Vo.
However, the stabilized direct-current power supply device configured as described above suffers from a problem ascribable to a large current that flows instantaneously at start-up. This problem will be described in detail below with reference to
FIGS. 5 and 6A
to
6
D.
FIGS. 6A
to
6
D are time charts of the voltages and current observed at relevant points in the stabilized direct-current power supply device of
FIG. 5
when it is operated without a load (with the load RL removed).
When the input voltage Vin starts being supplied to the input terminal
1
, as shown in
FIG. 6A
, the input voltage Vin rises. At the same time that the input voltage Vin rises, as shown in
FIG. 6B
, the reference voltage Vref rises. Here, it is assumed that the voltage Vc (not shown in
FIGS. 6A
to
6
D) also rises in synchronism with the input voltage Vin. At this time, as the charge current Ico of the capacitor Co, a current close to the limit of the current capacity of the transistor Q
1
flows instantaneously as shown in FIG.
6
D. Thereafter, when the capacitor Co is completely charged, and the output voltage Vo completely rises as shown in
FIG. 6C
, the output current Io drops to almost zero. Accordingly, the output voltage Vo-to-output current Io characteristic of the stabilized direct-current power supply device of FIG.
5
is as shown in FIG.
7
.
Since the stabilized direct-current power supply device of
FIG. 5
has an output voltage Vo-to-output current Io characteristic as shown in
FIG. 7
, even if the current I
L
that flows through the load RL in actual operation is small, a peak current Iop flows instantaneously at start-up. For this reason, unless the supply power source that supplies electric power to the stabilized direct-current power supply device has a sufficiently high capacity to permit the peak current Iop to flow, the output voltage of the supply power source drops at the start-up of the stabilized direct-current power supply device, and may cause malfunctioning of other systems connected in parallel with the stabilized direct-current power supply device. This requires the supply power source to have a considerably higher capacity than needed in actual operation, and thus makes the supply power source expensive.
To avoid this, a stabilized direct-current power supply device has been proposed that is provided with a means for reducing the output current Io at start-up.
FIG. 8
shows an example of the configuration of a conventional stabilized direct-current power supply device of this type. In
FIG. 8
, such circuit elements as are found also in
FIG. 5
are identified with the same reference numerals and symbols, and their explanations will not be repeated.
The stabilized direct-current power supply device of
FIG. 8
is obtained by providing the stabilized direct-current power supply device of
FIG. 5
additionally with a time constant circuit
11
. The time constant circuit
11
is composed of a resistor R
8
, a terminal
10
, and a capacitor C
2
, and is provided between the reference voltage circuit
5
and the error amplifier
4
. The resistor R
8
and the terminal
10
are integrated into the semiconductor integrated circuit device, and the capacitor C
2
is provided outside it. One end of the resistor R
8
is connected to the output end of the reference voltage circuit
5
, and the other end of the resistor R
8
is connected to the non-inverting input terminal of the error amplifier
4
and to the terminal
10
. The terminal
10
is grounded through the capacitor C
2
.
Next, the operation of the stabilized direct-current power supply device of
FIG. 8
will be described with reference to
FIGS. 8 and 9A
to
9
D.
FIGS. 9A
to
9
D are time charts of the voltages and current observed at relevant points in the stabilized direct-current
Laxton Gary L.
Sharp Kabushiki Kaisha
Sherry Michael
LandOfFree
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