Patent
1997-10-30
1998-10-13
Harrell, Robert B.
G06F 922
Patent
active
058225790
ABSTRACT:
A microprocessor (5) having a floating-point unit (31) with internal microcode control therein is disclosed. The microcode control is effected by a microsequencer (47) having a microcode ROM (68) and control circuitry (80) therein. A scheduler circuit (50) forwards status and condition information, such as results from floating-point operations received on buses (REG, RES, FS, X1) from elsewhere in the microprocessor (5), to a condition circuit (76; 76') in the microsequencer (47). The condition circuit (76; 76') includes a multiplexer (80) receiving each of the status values (STAT0 through STATn), along with a loop counter (81) and a programmable comparator (82). Microinstructions (.mu.WORD) accessed from the microcode ROM (68) include a select field (SEL), for controlling the multiplexer (80) to select one of the status values (STAT0 through STATn) or the contents of the counter (81) for comparison, an immediate field (IMMED) applied to the comparator (82) to supply a value against which the selected status value (STAT0 through STATn) or counter value is to be compared, and a type field (TYP) for selecting the type of comparison to be performed by the comparator (82). According to an alternative embodiment of the invention, a mask field (MASK) is applied to the output of the multiplexer (80) and to the immediate field (IMMED), so that the comparison is made only relative to selected bits therein. Microprogram control is then made in response to the result of the comparison made in the condition circuitry (76).
REFERENCES:
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patent: 5668985 (1997-09-01), Carbine et al.
patent: 5673427 (1997-09-01), Brown et al.
Coulter Kenneth R.
Donaldson Richard L.
Harrell Robert B.
Kesterson James C.
Marshall, Jr. Robert D.
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