Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2003-08-26
2004-09-21
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S723000, C257S701000
Reexamination Certificate
active
06794747
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device formed by packaging on a laminated substrate a semiconductor element and an electronic component as a peripheral circuit. More specifically, the present invention relates to a module structure.
BACKGROUND OF THE INVENTION
Recently proposed semiconductor devices are applied to transmission amplifiers used in portable phones or the like, and such semiconductor devices have a multilayer substrate on which an amplifying high-frequency power semiconductor element and a chip component for forming a matching circuit are provided (see, for example, JP 10(1998)-37054A, JP 2000-216307A, and JP 2002-9225A). A conventional semiconductor device will be described below by referring to FIG.
11
. In
FIG. 11
, numeral
1
denotes a high-frequency power semiconductor element,
2
denotes an alumina substrate or a ceramic multilayer substrate such as a low temperature cofired ceramic hereinafter, referred to as LTCC) substrate. Each numeral
3
denotes a chip component such as a chip capacitor, a chip resistor or a chip inductor. Numerals
4
,
5
,
6
,
7
, and
8
denote respectively an external connection electrode, a metal wire, a connection pad at a cavity step, a potting resin, and a metal cap. A component-packaging land and a circuit pattern are formed by screen-printing on the surface of the ceramic multilayer substrate. The high-frequency power semiconductor element
1
is mounted within a cavity
12
on the back face of the ceramic multilayer substrate
2
, electrically connected by the metal wire
5
to the connection pad
6
at the cavity step, and sealed with the metal wire
5
by the potting resin
7
for the purpose of protection. The chip components
3
are packaged as well at predetermined positions by a solder
15
. On the ceramic multilayer substrate
2
, the metal cap
8
is attached as a case. Furthermore, the external connection electrode
4
on the back face of the ceramic multilayer substrate
2
is electrically connected through a via hole
27
penetrating the ceramic multilayer substrate
2
to an inner layer pattern formed among layers of the substrate and the connection pad
6
, and also to the component-packaging land.
However, the conventional semiconductor device configured by only mounting a semiconductor element and chip components on a ceramic multilayer substrate cannot correspond to further miniaturization of a package under a situation in which the number of packaging components increases to provide an amplifier circuit with a higher performance. Thus a semiconductor device with a new structure is required. Furthermore, since a power semiconductor element as a heater element is packaged on the ceramic multilayer substrate, the whole heat generated by the semiconductor chip is conducted below through all of the ceramic multilayer substrates and discharged through a bottom electrode. However, the ceramic multilayer substrate has a high heat resistance, and it is difficult to arrange the via hole
27
in the vicinity of the high-frequency power semiconductor element. As a result, a semiconductor chip consuming high power will be in a high temperature state due to insufficient heat dissipation.
A LTCC substrate is rather preferred from an aspect of miniaturization of a package, since it allows simultaneous formation of a printed resistor, a laminate capacitor, and an inductor provided by a circuit pattern during a low temperature cofiring, thereby decreasing the number of electronic components on the substrate surface. However, since the LTCC has a thermal conductivity about one-tenth that of an alumina substrate fired at a high temperature, heat dissipation of the semiconductor chip will deteriorate. In addition, the LTCC substrate tends to be quite fragile since the transverse strength of the LTCC is lower than that of the alumina substrate.
Although an alumina substrate has good thermal conduction and high transverse strength, it cannot include a component function within the substrate because the firing temperature is high. As a result, the alumina substrate cannot be miniaturized when the number of the components increases.
SUMMARY OF THE INVENTION
For solving the above-described problems, an object of the present invention is to provide a downsized semiconductor device securing heat dissipation characteristics and a transverse strength. The semiconductor device is provided by packaging on a laminated substrate having a component function, a power semiconductor element, a controlling semiconductor element, a filter element, a switching element and a chip electronic component as a peripheral circuit.
For achieving the above-mentioned object, a semiconductor device according to the present invention includes as a central substrate a high thermo conductive ceramic substrate having circuit patterns formed on opposed surfaces; wherein at least one layer of a first circuit board having a first cavity structure is provided on one surface of the high thermo conductive ceramic substrate, at least one layer of a second circuit board having a second cavity structure is provided on the other surface, a first active element is mounted on a circuit pattern on the high thermo conductive ceramic substrate within the first cavity, a second active element is mounted on a circuit pattern on the high thermo conductive ceramic substrate within the second cavity, an external electrode is integrated with a surface of the second circuit board, and the first circuit board surface is equipped with a cap or sealed with resin. The semiconductor device is characterized in that a heat dissipation via is formed on the second circuit board, the high thermo conductive ceramic substrate and the external electrode on the second circuit board surface are connected thermally, and heat from at least one active element selected from the first and second active elements is dissipated outward through the high thermo conductive ceramic substrate, the heat dissipation via hole and the external electrode on the second circuit board surface.
REFERENCES:
patent: 6072122 (2000-06-01), Hosoya
patent: 6114413 (2000-09-01), Kang et al.
patent: 6320543 (2001-11-01), Ohata et al.
patent: 6630727 (2003-10-01), Tutsch et al.
patent: 2002/0049042 (2002-04-01), Oida et al.
patent: 198 08 986 (1999-09-01), None
patent: 0 933 816 (1999-08-01), None
patent: 10-37054 (1998-02-01), None
patent: 2000-216307 (2000-08-01), None
patent: 2002-9225 (2002-01-01), None
Kanazawa Kunihiko
Takehara Hideki
Yoshikawa Noriyuki
Matsushita Electric - Industrial Co., Ltd.
Merchant & Gould P.C.
Potter Roy
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