Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays
Reexamination Certificate
2002-12-30
2004-03-02
Quach, T. N. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
C257S499000, C257S528000, C257S618000, C438S014000, C438S128000, C438S130000
Reexamination Certificate
active
06700142
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a semiconductor wafer having an integrated circuit that includes a working set of discrete functional modules that are arranged into a rectangular array of rows and columns within a rectilinear boundary, and a spare set of discrete functional modules that are positioned outside the rectilinear boundary of the working set of discrete functional modules such that the discrete functional modules in the spare set may replace one or more defective discrete functional modules in the working set.
BACKGROUND OF THE INVENTION
In the field of wafer scale integration (WSI) and large area integrated circuit (LAIC) manufacturing, it is known to design a complex integrated circuit on a semiconductor wafer such that the semiconductor wafer has a predetermined global functionality. The bulk of potential functionalities require regular arrays of circuitry that together form a complex integrated circuit. Such integrated circuits generally comprise a plurality of discrete functional modules that are formed into a rectangular array of rows and columns. The rectangular array of discrete functional modules is generally positioned in the center of the semiconductor wafer such that the four corners of the array are adjacent the circular periphery of the semiconductor wafer.
During the fabrication of the discrete functional modules of the integrated circuit, some of the discrete functional modules can be formed defective. Therefore, the integrated circuit includes two specific sets of discrete functional modules: a working set of discrete functional modules and a spare set of discrete functional modules that can replace the functionality of defective discrete functional modules in the working set. The discrete functional modules in the spare set generally occupy the outside rows and/or columns of the rectangular array and the discrete functional modules in the working set are generally grouped within the center of the integrated circuit. Alternatively, the discrete functional modules in the spare set can be interspersed with the discrete functional modules in the working set within the rows and columns of the array of the integrated circuit. Either way, the array of functional modules of the integrated circuits formed on semiconductor wafers according to the prior art leaves large crescent shaped regions on the semiconductor wafer unused.
In light of the costs and complexity involved in making semiconductor wafers, there exists a need in the industry for a configuration of discrete functional modules that better utilizes the space available on a semiconductor wafer.
SUMMARY OF THE INVENTION
As embodied and broadly described herein, the present invention provides a semiconductor wafer that has a predetermined global functionality. The semiconductor wafer comprises a body of semiconductor material having a top surface, a bottom surface and a peripheral edge between the top surface and the bottom surface. The semiconductor wafer further includes an integrated circuit fabricated on the body of semiconductor material. The integrated circuit includes a working set of discrete functional modules that are of generally identical dimensions and are arranged into a rectangular array of rows and columns with a discrete functional module at each one of the four corners. The rectangular array has a boundary that includes four rectilinear sides and four corners. A space is defined between each corner of the rectangular array and the peripheral edge of the semiconductor wafer. Each space is insufficient to accommodate a discrete functional module between the corner and the periphery in a rectangular arrangement with the discrete functional module at the corner of the rectangular array. The integrated circuit further includes a spare set of discrete functional modules formed between the boundary of the working set and the peripheral edge of the semiconductor wafer. The discrete functional modules in the spare set are arranged in at least one line that is disposed along at least one rectilinear side of the rectangular array. The length of the line of discrete functional modules is less than a length of one rectilinear side of the rectangular array.
As further embodied and broadly described herein, the present invention provides a method for manufacturing a semiconductor wafer that has a predetermined global functionality. The method comprises fabricating an integrated circuit on a body of semiconductor material that has a top surface, a bottom surface and a peripheral edge between the top surface and the bottom surface. The integrated circuit includes a working set of discrete functional modules that are of generally identical dimensions and are arranged into a rectangular array of rows and columns. The rectangular array has a boundary that includes four corners. The rectangular array has a discrete functional module at each one of its four corners. A space is defined between each corner of the working set and the peripheral edge of the semiconductor wafer. Each space is insufficient to accommodate a discrete functional module between the corner and the periphery in a rectangular arrangement with the discrete functional module at the corner of the rectangular array. The integrated circuit further includes a spare set of discrete functional modules formed between the boundary and the peripheral edge. The method includes testing the discrete functional modules in the working set and if the testing determines that all the discrete functional modules in the working set are operational, then the method involves completing the manufacturing of the semiconductor wafer or configuring the circuitry of the semiconductor wafer such that only the discrete functional modules in the working set provide the predetermined global functionality of the semiconductor wafer. If the testing reveals that one or more discrete functional modules in the working set are defective, then the method involves functionally replacing the defective discrete functional modules in the working set with a corresponding number of discrete functional modules in the spare set to provide the predetermined global functionality.
As a non-limiting, example of implementation, the “completing” step and the “functionally replacing” step may include selectively setting up or negating inter-functional-module connections through techniques well known in the art such as laser programmable anti-fuse, etc., or through electronically enabling or disabling inter-functional-module links.
The advantage of the above-described semiconductor wafer and manufacturing process is that they provide more space for the discrete functional modules in the working set by forming the discrete functional modules in the spare set in an area of a semiconductor wafer that was previously unused. This allows more discrete functional modules to be included in the working set, or alternatively allows the size of the discrete functional modules in the working set to be enlarged so as to provide more space for internal circuitry.
In a specific example of implementation, when all the discrete functional modules in the working set are operational, and signal interconnects are established only between the discrete functional modules in the working set, such that the discrete functional modules in the spare set are unconnected thereby rendering them inoperational, then “completing” the manufacturing of the semiconductor wafer involves carrying out the normal steps required to put the semiconductor wafer into use. Such steps are known in the art and will not be discussed further herein. In other words, nothing is done with the discrete functional modules in the spare set, and they are left unconnected to the functional modules of the working set.
Alternatively, when all the discrete functional modules in the working set are operational, and signal interconnects are established between both the discrete functional modules in the spare set and the discrete functional modules in the working set, then completing the manufacturing of the semiconductor wafer inv
Hyperchip Inc.
Quach T. N.
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